forked from OSchip/llvm-project
195 lines
8.3 KiB
LLVM
195 lines
8.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-globals
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; call site specific analysis is enabled
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; RUN: opt -attributor -enable-new-pm=0 -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
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; RUN: opt -attributor-cgscc -attributor-enable-call-site-specific-deduction=true -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
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define dso_local i32 @test_range1(i32 %0) #0 {
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; CHECK-LABEL: define {{[^@]+}}@test_range1
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; CHECK-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]]
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; CHECK: 3:
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; CHECK-NEXT: br label [[TMP5:%.*]]
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; CHECK: 4:
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; CHECK-NEXT: br label [[TMP5]]
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; CHECK: 5:
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; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 100, [[TMP3]] ], [ 0, [[TMP4]] ]
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; CHECK-NEXT: ret i32 [[DOT0]]
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;
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%2 = icmp ne i32 %0, 0
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br i1 %2, label %3, label %4
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3: ; preds = %1
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br label %5
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4: ; preds = %1
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br label %5
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5: ; preds = %4, %3
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%.0 = phi i32 [ 100, %3 ], [ 0, %4 ]
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ret i32 %.0
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}
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define i32 @test_range2(i32 %0) #0 {
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; CHECK-LABEL: define {{[^@]+}}@test_range2
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; CHECK-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]]
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; CHECK: 3:
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; CHECK-NEXT: br label [[TMP5:%.*]]
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; CHECK: 4:
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; CHECK-NEXT: br label [[TMP5]]
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; CHECK: 5:
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; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 100, [[TMP3]] ], [ 200, [[TMP4]] ]
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; CHECK-NEXT: ret i32 [[DOT0]]
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;
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%2 = icmp ne i32 %0, 0
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br i1 %2, label %3, label %4
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3: ; preds = %1
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br label %5
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4: ; preds = %1
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br label %5
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5: ; preds = %4, %3
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%.0 = phi i32 [ 100, %3 ], [ 200, %4 ]
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ret i32 %.0
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}
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define i32 @test(i32 %0, i32 %1) #0 {
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; CHECK-LABEL: define {{[^@]+}}@test
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; CHECK-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], 0
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP6:%.*]]
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; CHECK: 4:
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; CHECK-NEXT: [[TMP5:%.*]] = call i32 @test_range1(i32 [[TMP0]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: br label [[TMP8:%.*]]
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; CHECK: 6:
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @test_range2(i32 [[TMP0]]) #[[ATTR1]], !range [[RNG1:![0-9]+]]
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; CHECK-NEXT: br label [[TMP8]]
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; CHECK: 8:
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; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ [[TMP5]], [[TMP4]] ], [ [[TMP7]], [[TMP6]] ]
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; CHECK-NEXT: ret i32 [[DOT0]]
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;
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%3 = icmp ne i32 %1, 0
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br i1 %3, label %4, label %6
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4: ; preds = %2
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%5 = call i32 @test_range1(i32 %0)
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br label %8
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6: ; preds = %2
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%7 = call i32 @test_range2(i32 %0)
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br label %8
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8: ; preds = %6, %4
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%.0 = phi i32 [ %5, %4 ], [ %7, %6 ]
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ret i32 %.0
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}
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define i32 @test_pcheck1(i32 %0) #0 {
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; IS__TUNIT____-LABEL: define {{[^@]+}}@test_pcheck1
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; IS__TUNIT____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__TUNIT____-NEXT: ret i32 1
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;
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; IS__CGSCC____-LABEL: define {{[^@]+}}@test_pcheck1
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; IS__CGSCC____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = call i32 @test(i32 [[TMP0]], i32 noundef 1) #[[ATTR1]], !range [[RNG2:![0-9]+]]
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; IS__CGSCC____-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 101
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; IS__CGSCC____-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
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; IS__CGSCC____-NEXT: ret i32 [[TMP4]]
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;
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; IS__TUNIT_____ENABLED-LABEL: define {{[^@]+}}@test_pcheck1
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; IS__TUNIT_____ENABLED-SAME: (i32 [[TMP0:%.*]])
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; IS__TUNIT_____ENABLED-NEXT: ret i32 1
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%2 = call i32 @test(i32 %0, i32 1)
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%3 = icmp slt i32 %2, 101
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%4 = zext i1 %3 to i32
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ret i32 %4
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}
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define i32 @test_pcheck2(i32 %0) #0 {
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; IS__TUNIT____-LABEL: define {{[^@]+}}@test_pcheck2
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; IS__TUNIT____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__TUNIT____-NEXT: ret i32 1
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;
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; IS__CGSCC____-LABEL: define {{[^@]+}}@test_pcheck2
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; IS__CGSCC____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = call i32 @test(i32 [[TMP0]], i32 noundef 0) #[[ATTR1]], !range [[RNG2]]
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; IS__CGSCC____-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 99
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; IS__CGSCC____-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
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; IS__CGSCC____-NEXT: ret i32 [[TMP4]]
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;
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%2 = call i32 @test(i32 %0, i32 0)
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%3 = icmp sgt i32 %2, 99
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%4 = zext i1 %3 to i32
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ret i32 %4
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}
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define i32 @test_ncheck1(i32 %0) #0 {
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; IS__TUNIT____-LABEL: define {{[^@]+}}@test_ncheck1
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; IS__TUNIT____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__TUNIT____-NEXT: [[TMP2:%.*]] = call i32 @test(i32 [[TMP0]], i32 noundef 1) #[[ATTR1]], !range [[RNG0]]
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; IS__TUNIT____-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 50
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; IS__TUNIT____-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
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; IS__TUNIT____-NEXT: ret i32 [[TMP4]]
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;
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; IS__CGSCC____-LABEL: define {{[^@]+}}@test_ncheck1
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; IS__CGSCC____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = call i32 @test(i32 [[TMP0]], i32 noundef 1) #[[ATTR1]], !range [[RNG2]]
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; IS__CGSCC____-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 50
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; IS__CGSCC____-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
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; IS__CGSCC____-NEXT: ret i32 [[TMP4]]
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;
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%2 = call i32 @test(i32 %0, i32 1)
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%3 = icmp sgt i32 %2, 50
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%4 = zext i1 %3 to i32
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ret i32 %4
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}
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define i32 @test_ncheck2(i32 %0) #0 {
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; IS__TUNIT____-LABEL: define {{[^@]+}}@test_ncheck2
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; IS__TUNIT____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__TUNIT____-NEXT: [[TMP2:%.*]] = call i32 @test(i32 [[TMP0]], i32 noundef 0) #[[ATTR1]], !range [[RNG1]]
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; IS__TUNIT____-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 150
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; IS__TUNIT____-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
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; IS__TUNIT____-NEXT: ret i32 [[TMP4]]
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;
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; IS__CGSCC____-LABEL: define {{[^@]+}}@test_ncheck2
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; IS__CGSCC____-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
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; IS__CGSCC____-NEXT: [[TMP2:%.*]] = call i32 @test(i32 [[TMP0]], i32 noundef 0) #[[ATTR1]], !range [[RNG2]]
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; IS__CGSCC____-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 150
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; IS__CGSCC____-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
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; IS__CGSCC____-NEXT: ret i32 [[TMP4]]
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;
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%2 = call i32 @test(i32 %0, i32 0)
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%3 = icmp sgt i32 %2, 150
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%4 = zext i1 %3 to i32
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ret i32 %4
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}
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attributes #0 = { noinline nounwind sspstrong uwtable}
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; IS__TUNIT_____: !0 = !{i32 0, i32 101}
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; IS__TUNIT_____: !1 = !{i32 100, i32 201}
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;.
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; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone sspstrong uwtable willreturn }
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; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
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;.
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; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn }
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; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn }
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;.
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; IS__TUNIT____: [[RNG0]] = !{i32 0, i32 101}
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; IS__TUNIT____: [[RNG1]] = !{i32 100, i32 201}
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;.
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; IS__CGSCC____: [[RNG0]] = !{i32 0, i32 101}
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; IS__CGSCC____: [[RNG1]] = !{i32 100, i32 201}
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; IS__CGSCC____: [[RNG2]] = !{i32 0, i32 201}
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;.
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