llvm-project/llvm/test/CodeGen/MIR
Matt Arsenault 52f14ec596 AMDGPU: Preserve vcc undef flags when inverting branch
If the branch was on a read-undef of vcc, passes that used
analyzeBranch to invert the branch condition wouldn't preserve
the undef flag resulting in a verifier error.

Fixes verifier failures in a future commit.

Also fix verifier error when inserting copy for vccz
corruption bug.

llvm-svn: 286133
2016-11-07 19:09:27 +00:00
..
AArch64 Add AArch64 unit tests 2016-10-12 09:00:44 +00:00
AMDGPU AMDGPU: Preserve vcc undef flags when inverting branch 2016-11-07 19:09:27 +00:00
ARM MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 2016-08-25 01:27:13 +00:00
Generic MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing it 2016-08-24 22:34:06 +00:00
Hexagon [MIRParser] Parse lane masks for register live-ins 2016-10-12 21:06:45 +00:00
Lanai MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 2016-08-25 01:27:13 +00:00
Mips MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
NVPTX llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
PowerPC MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
X86 MIRParser: Rewrite register info initialization; mostly NFC 2016-10-11 03:13:01 +00:00