llvm-project/llvm/test/MC/Disassembler
Michael Liao 95d9440348 Add CLAC/STAC instruction encoding/decoding support
As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.

llvm-svn: 179266
2013-04-11 04:52:28 +00:00
..
AArch64 AArch64: implement ETMv4 trace system registers. 2013-04-03 12:31:29 +00:00
ARM ARM: Make "SMC" instructions conditional on new TrustZone architecture feature. 2013-04-10 12:08:35 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips This is a resubmittal. For some reason it broke the bots yesterday 2013-01-17 00:28:20 +00:00
X86 Add CLAC/STAC instruction encoding/decoding support 2013-04-11 04:52:28 +00:00
XCore [XCore] Add bru instruction. 2013-04-04 20:05:35 +00:00