llvm-project/llvm/test/Transforms/LoopStrengthReduce/X86
Sanjay Patel d7c702b451 [LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681)
In the motivating case from PR35681 and represented by the macro-fuse-cmp test:
https://bugs.llvm.org/show_bug.cgi?id=35681
...there's a 37 -> 31 byte size win for the loop because we eliminate the big base 
address offsets.

SPEC2017 on Ryzen shows no significant perf difference.

Differential Revision: https://reviews.llvm.org/D42607

llvm-svn: 324289
2018-02-05 23:43:05 +00:00
..
2008-08-14-ShadowIV.ll [LSR] Fix Shadow IV in case of integer overflow 2017-08-29 07:32:20 +00:00
2009-11-10-LSRCrash.ll
2011-07-20-DoubleIV.ll
2011-11-29-postincphi.ll
2011-12-04-loserreg.ll
2012-01-13-phielim.ll
bin_power.ll [SCEV] Teach SCEVExpander to expand BinPow 2017-06-19 06:24:53 +00:00
canonical-2.ll [LSR] Call canonicalize after we generate a new Formula in GenerateTruncates. Fix PR33077. 2017-05-18 17:21:22 +00:00
canonical.ll Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720). 2017-08-07 19:56:34 +00:00
incorrect-offset-scaling.ll Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start" 2017-05-26 06:47:04 +00:00
ivchain-X86.ll [LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681) 2018-02-05 23:43:05 +00:00
ivchain-stress-X86.ll
lit.local.cfg
lsr-expand-quadratic.ll Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720). 2017-08-07 19:56:34 +00:00
lsr-filtering-scaledreg.ll [LSR] Narrow search space by filtering non-optimal formulae with the same ScaledReg and Scale. 2017-07-06 15:52:14 +00:00
lsr-insns-1.ll [x86] auto-generate complete checks; NFC 2018-01-26 22:06:07 +00:00
lsr-insns-2.ll Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720). 2017-08-07 19:56:34 +00:00
macro-fuse-cmp.ll [LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681) 2018-02-05 23:43:05 +00:00
nested-loop.ll [LSR] Don't force bases of foldable formulae to the final type. 2018-02-01 06:38:34 +00:00
no_superflous_induction_vars.ll
pr17473.ll
pr28719.ll
sibling-loops.ll [LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loops 2017-02-16 21:27:31 +00:00