Dmitry Preobrazhensky f20aff565d [AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate* ... See bug 36840: https://bugs.llvm.org/show_bug.cgi?id=36840 Differential Revision: https://reviews.llvm.org/D45250 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 329419		2018-04-06 16:35:11 +00:00
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AArch64	[AArch64] Fix spelling of ICH_ELRSR_EL2 system register	2018-02-06 09:39:04 +00:00
AMDGPU	[AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*	2018-04-06 16:35:11 +00:00
ARC	[ARC] Add <.f> suffix for F32_GEN4_{DOP|SOP}.	2018-04-06 15:43:11 +00:00
ARM	[ARM]Decoding MSR with unpredictable destination register causes an assert	2018-03-06 15:21:19 +00:00
Hexagon	[Hexagon] Remove trailing spaces, NFC	2017-11-22 20:43:00 +00:00
Lanai	…
Mips	[mips] Add support for CRC ASE	2018-03-14 14:13:31 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
Sparc	…
SystemZ	[SystemZ] Add support for IBM z14 processor (3/3)	2017-07-17 17:44:20 +00:00
X86	[X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168)	2018-02-17 14:58:16 +00:00
XCore	…