forked from OSchip/llvm-project
a45fb1942f
This patch introduces interfaces for read and write ops with affine restrictions. I used `read`/`write` intead of `load`/`store` for the interfaces so that they can also be implemented by dma ops. For now, they are only implemented by affine.load, affine.store, affine.vector_load and affine.vector_store. For testing purposes, this patch also migrates affine loop fusion and required analysis to use the new interfaces. No other changes are made beyond that. Co-authored-by: Alex Zinenko <zinenko@google.com> Reviewed By: bondhugula, ftynse Differential Revision: https://reviews.llvm.org/D79829 |
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AffineAnalysis.cpp | ||
AffineStructures.cpp | ||
CMakeLists.txt | ||
CallGraph.cpp | ||
Liveness.cpp | ||
LoopAnalysis.cpp | ||
NestedMatcher.cpp | ||
SliceAnalysis.cpp | ||
Utils.cpp |