forked from OSchip/llvm-project
66 lines
1.9 KiB
YAML
66 lines
1.9 KiB
YAML
# RUN: llc -march=riscv32 -x mir -run-pass=machine-outliner -simplify-mir -verify-machineinstrs < %s \
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# RUN: | FileCheck -check-prefix=RV32I-MO %s
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# RUN: llc -march=riscv64 -x mir -run-pass=machine-outliner -simplify-mir -verify-machineinstrs < %s \
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# RUN: | FileCheck -check-prefix=RV64I-MO %s
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--- |
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; Cannot outline instructions with jump-table index operands
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define i32 @foo(i32 %a, i32 %b) #0 { ret i32 0 }
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...
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---
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name: foo
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tracksRegLiveness: true
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jumpTable:
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kind: block-address
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entries:
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- id: 0
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blocks: [ '%bb.0', '%bb.1', '%bb.2', '%bb.3' ]
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body: |
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bb.0:
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liveins: $x10, $x11
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; RV32I-MO-LABEL: name: foo
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; RV32I-MO: $x5 = PseudoCALLReg {{.*}} @OUTLINED_FUNCTION_0
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; RV32I-MO: $x12 = LUI target-flags(riscv-hi) %jump-table.0
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; RV32I-MO: $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0
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;
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; RV64I-MO-LABEL: name: foo
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; RV64I-MO: $x5 = PseudoCALLReg {{.*}} @OUTLINED_FUNCTION_0
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; RV64I-MO: $x12 = LUI target-flags(riscv-hi) %jump-table.0
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; RV64I-MO: $x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0
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$x11 = ORI $x11, 1023
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$x12 = ADDI $x10, 17
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$x11 = AND $x12, $x11
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$x10 = SUB $x10, $x11
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$x12 = LUI target-flags(riscv-hi) %jump-table.0
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$x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0
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PseudoBR %bb.3
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bb.1:
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liveins: $x10, $x11
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$x11 = ORI $x11, 1023
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$x12 = ADDI $x10, 17
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$x11 = AND $x12, $x11
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$x10 = SUB $x10, $x11
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$x12 = LUI target-flags(riscv-hi) %jump-table.0
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$x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0
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PseudoBR %bb.3
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bb.2:
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liveins: $x10, $x11
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$x11 = ORI $x11, 1023
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$x12 = ADDI $x10, 17
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$x11 = AND $x12, $x11
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$x10 = SUB $x10, $x11
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$x12 = LUI target-flags(riscv-hi) %jump-table.0
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$x12 = ADDI $x12, target-flags(riscv-lo) %jump-table.0
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PseudoBR %bb.3
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bb.3:
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PseudoRET
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...
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