forked from OSchip/llvm-project
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
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define dso_local signext i32 @caller(i32 signext %a, i32 signext %b) local_unnamed_addr {
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; CHECK-LABEL: caller:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: std r0, 16(r1)
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; CHECK-NEXT: stdu r1, -240(r1)
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; CHECK-NEXT: .cfi_def_cfa_offset 240
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: .cfi_offset v20, -192
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; CHECK-NEXT: li r5, 48
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; CHECK-NEXT: stvx v20, r1, r5 # 16-byte Folded Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: add r3, r3, r4
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: extsw r3, r3
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; CHECK-NEXT: bl callee
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; CHECK-NEXT: nop
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; CHECK-NEXT: li r4, 48
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; CHECK-NEXT: lvx v20, r1, r4 # 16-byte Folded Reload
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; CHECK-NEXT: addi r1, r1, 240
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{v20}"(i32 %a, i32 %b)
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%call = tail call signext i32 @callee(i32 signext %0)
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ret i32 %call
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}
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declare signext i32 @callee(i32 signext) local_unnamed_addr
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