forked from OSchip/llvm-project
45 lines
1.5 KiB
YAML
45 lines
1.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=powerpc64le -simplify-mir -verify-machineinstrs \
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# RUN: -run-pass=peephole-opt %s -o - | FileCheck %s
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# Test to show effect of `optimizeCompareInstr` when `equalityOnly` is true.
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---
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name: h
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: g8rc }
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- { id: 1, class: g8rc }
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- { id: 2, class: g8rc_and_g8rc_nox0 }
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- { id: 3, class: crrc }
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- { id: 4, class: g8rc_and_g8rc_nox0 }
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- { id: 5, class: g8rc }
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liveins:
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- { reg: '$x3', virtual-reg: '%0' }
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- { reg: '$x4', virtual-reg: '%1' }
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x3, $x4
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; CHECK-LABEL: name: h
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; CHECK: liveins: $x3, $x4
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; CHECK: [[COPY:%[0-9]+]]:g8rc = COPY $x4
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; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x3
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; CHECK: [[SUBF8_rec:%[0-9]+]]:g8rc_and_g8rc_nox0 = SUBF8_rec [[COPY]], [[COPY1]], implicit-def $cr0
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; CHECK: [[COPY2:%[0-9]+]]:crrc = COPY killed $cr0
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; CHECK: [[ISEL8_:%[0-9]+]]:g8rc = ISEL8 $zero8, [[SUBF8_rec]], [[COPY2]].sub_eq
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; CHECK: $x3 = COPY [[ISEL8_]]
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; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
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%1:g8rc = COPY $x4
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%0:g8rc = COPY $x3
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%2:g8rc_and_g8rc_nox0 = SUBF8 %1, %0
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%3:crrc = CMPLD %0, %1
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%4:g8rc_and_g8rc_nox0 = LI8 0
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%5:g8rc = ISEL8 %4, %2, %3.sub_eq
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$x3 = COPY %5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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