forked from OSchip/llvm-project
45 lines
1.6 KiB
LLVM
45 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s \
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; RUN: -stop-after=finalize-isel -verify-machineinstrs | FileCheck %s
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define i64 @load(i64* %p) {
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; CHECK-LABEL: name: load
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; CHECK: bb.0.entry:
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; CHECK: liveins: $x3
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; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
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; CHECK: [[LD:%[0-9]+]]:g8rc = LD 24, [[COPY]] :: (load (s64) from %ir.arrayidx, align 2)
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; CHECK: $x3 = COPY [[LD]]
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; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %p, i64 3
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%0 = load i64, i64* %arrayidx, align 2
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ret i64 %0
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}
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define void @store(i64* %p) {
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; CHECK-LABEL: name: store
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; CHECK: bb.0.entry:
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; CHECK: liveins: $x3
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; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
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; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 9
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; CHECK: STD killed [[LI8_]], 16, [[COPY]] :: (store (s64) into %ir.arrayidx, align 1)
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; CHECK: BLR8 implicit $lr8, implicit $rm
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %p, i64 2
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store i64 9, i64* %arrayidx, align 1
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ret void
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}
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define void @store_aligned(i64* %p) {
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; CHECK-LABEL: name: store_aligned
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; CHECK: bb.0.entry:
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; CHECK: liveins: $x3
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; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
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; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 9
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; CHECK: STD killed [[LI8_]], 16, [[COPY]] :: (store (s64) into %ir.arrayidx, align 4)
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; CHECK: BLR8 implicit $lr8, implicit $rm
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %p, i64 2
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store i64 9, i64* %arrayidx, align 4
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ret void
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}
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