forked from OSchip/llvm-project
19 lines
692 B
LLVM
19 lines
692 B
LLVM
; RUN: llc -verify-machineinstrs -mcpu=g5 -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck %s
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; Check that the peephole optimizer knows about sext and zext instructions.
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; CHECK: test1sext
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define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
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%C = add i64 %A, %B
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; CHECK: add [[SUM:r[0-9]+]], r3, r4
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%D = trunc i64 %C to i32
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%E = shl i64 %C, 32
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%F = ashr i64 %E, 32
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; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]]
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store volatile i64 %F, i64 *%P2
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; CHECK-DAG: std [[EXT]]
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store volatile i32 %D, i32* %P
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; Reuse low bits of extended register, don't extend live range of SUM.
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; CHECK-DAG: stw [[SUM]]
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%R = add i32 %D, %D
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ret i32 %R
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}
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