forked from OSchip/llvm-project
32 lines
1.2 KiB
LLVM
32 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
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; RUN: --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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; RUN: --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
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; RUN: --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
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; RUN: --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr7 < %s | FileCheck %s
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define dso_local void @test_builtin_ppc_iospace_lwsync() {
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; CHECK-LABEL: test_builtin_ppc_iospace_lwsync:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: msync
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; CHECK-NEXT: blr
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entry:
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call void @llvm.ppc.iospace.lwsync()
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ret void
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}
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declare void @llvm.ppc.iospace.lwsync()
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define dso_local void @test_builtin_ppc_iospace_sync() {
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; CHECK-LABEL: test_builtin_ppc_iospace_sync:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: msync
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; CHECK-NEXT: blr
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entry:
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call void @llvm.ppc.iospace.sync()
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ret void
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}
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declare void @llvm.ppc.iospace.sync()
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