forked from OSchip/llvm-project
130 lines
7.4 KiB
LLVM
130 lines
7.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 \
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; RUN: -mattr=+altivec -vec-extabi -xcoff-traceback-table=true < %s | \
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; RUN: FileCheck --check-prefixes=CHECK-ASM,COMMON %s
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; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -function-sections \
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; RUN: -mcpu=pwr7 -mattr=+altivec -vec-extabi < %s | \
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; RUN: FileCheck --check-prefixes=CHECK-FUNC,COMMON %s
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;; #include <altivec.h>
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;; vector float f(vector int vi1, int i1, int i2, float f1, vector float vf,double d1, vector char vc1) {
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;; return vec_abs(vf);
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;; }
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;; vector float fin(int x) {
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;; vector float vf ={1.0,1.0,1.0,1.0};
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;; if (x) return vf;
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;; return vec_abs(vf);
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;; }
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define dso_local <4 x float> @f(<4 x i32> %vi1, i32 signext %i1, i32 signext %i2, float %f1, <4 x float> %vf, double %d1, <16 x i8> %vc1) #0 {
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entry:
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%__a.addr.i = alloca <4 x float>, align 16
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%vi1.addr = alloca <4 x i32>, align 16
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%i1.addr = alloca i32, align 4
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%i2.addr = alloca i32, align 4
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%f1.addr = alloca float, align 4
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%vf.addr = alloca <4 x float>, align 16
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%d1.addr = alloca double, align 8
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%vc1.addr = alloca <16 x i8>, align 16
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store <4 x i32> %vi1, <4 x i32>* %vi1.addr, align 16
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store i32 %i1, i32* %i1.addr, align 4
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store i32 %i2, i32* %i2.addr, align 4
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store float %f1, float* %f1.addr, align 4
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store <4 x float> %vf, <4 x float>* %vf.addr, align 16
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store double %d1, double* %d1.addr, align 8
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store <16 x i8> %vc1, <16 x i8>* %vc1.addr, align 16
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%0 = load <4 x float>, <4 x float>* %vf.addr, align 16
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store <4 x float> %0, <4 x float>* %__a.addr.i, align 16
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%1 = load <4 x float>, <4 x float>* %__a.addr.i, align 16
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%2 = load <4 x float>, <4 x float>* %__a.addr.i, align 16
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%3 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %2) #2
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ret <4 x float> %3
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}
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define <4 x float> @fin(i32 %x) #0 {
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entry:
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%__a.addr.i = alloca <4 x float>, align 16
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%__res.i = alloca <4 x i32>, align 16
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%retval = alloca <4 x float>, align 16
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%x.addr = alloca i32, align 4
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%vf = alloca <4 x float>, align 16
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store i32 %x, i32* %x.addr, align 4
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store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float>* %vf, align 16
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%0 = load i32, i32* %x.addr, align 4
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%tobool = icmp ne i32 %0, 0
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br i1 %tobool, label %if.then, label %if.end
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if.then: ; preds = %entry
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%1 = load <4 x float>, <4 x float>* %vf, align 16
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store <4 x float> %1, <4 x float>* %retval, align 16
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br label %return
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if.end: ; preds = %entry
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%2 = load <4 x float>, <4 x float>* %vf, align 16
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store <4 x float> %2, <4 x float>* %__a.addr.i, align 16
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%3 = load <4 x float>, <4 x float>* %__a.addr.i, align 16
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%4 = bitcast <4 x float> %3 to <4 x i32>
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%and.i = and <4 x i32> %4, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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store <4 x i32> %and.i, <4 x i32>* %__res.i, align 16
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%5 = load <4 x i32>, <4 x i32>* %__res.i, align 16
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%6 = bitcast <4 x i32> %5 to <4 x float>
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store <4 x float> %6, <4 x float>* %retval, align 16
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br label %return
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return: ; preds = %if.end, %if.then
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%7 = load <4 x float>, <4 x float>* %retval, align 16
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ret <4 x float> %7
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}
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declare <4 x float> @llvm.fabs.v4f32(<4 x float>) #1
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; COMMON: L..f0:
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; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
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; COMMON-NEXT: .byte 0x00 # Version = 0
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; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
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; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
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; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
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; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
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; COMMON-NEXT: # +IsFloatingPointPresent
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; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled
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; COMMON-NEXT: .byte 0x40 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed
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; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved
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; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0
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; COMMON-NEXT: .byte 0x40 # -HasExtensionTable, +HasVectorInfo, NumOfGPRsSaved = 0
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; COMMON-NEXT: .byte 0x02 # NumberOfFixedParms = 2
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; COMMON-NEXT: .byte 0x05 # NumberOfFPParms = 2, +HasParmsOnStack
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; COMMON-NEXT: .vbyte 4, 0x42740000 # Parameter type = v, i, i, f, v, d, v
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; CHECK-ASM-NEXT: .vbyte 4, L..f0-.f # Function size
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; CHECK-FUNC-NEXT: .vbyte 4, L..f0-.f[PR] # Function size
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; COMMON-NEXT: .vbyte 2, 0x0001 # Function name len = 1
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; COMMON-NEXT: .byte 102 # Function Name
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; COMMON-NEXT: .byte 0x00 # NumOfVRsSaved = 0, -IsVRSavedOnStack, -HasVarArgs
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; COMMON-NEXT: .byte 0x07 # NumOfVectorParams = 3, +HasVMXInstruction
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; COMMON-NEXT: .vbyte 4, 0xb0000000 # Vector Parameter type = vi, vf, vc
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; COMMON-NEXT: .vbyte 2, 0x0000 # Padding
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; COMMON: L..fin0:
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; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
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; COMMON-NEXT: .byte 0x00 # Version = 0
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; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
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; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
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; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure
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; COMMON-NEXT: # -HasControlledStorage, -IsTOCless
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; COMMON-NEXT: # +IsFloatingPointPresent
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; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled
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; COMMON-NEXT: .byte 0x40 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed
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; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved
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; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0
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; COMMON-NEXT: .byte 0x40 # -HasExtensionTable, +HasVectorInfo, NumOfGPRsSaved = 0
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; COMMON-NEXT: .byte 0x01 # NumberOfFixedParms = 1
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; COMMON-NEXT: .byte 0x01 # NumberOfFPParms = 0, +HasParmsOnStack
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; COMMON-NEXT: .vbyte 4, 0x00000000 # Parameter type = i
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; CHECK-ASM-NEXT: .vbyte 4, L..fin0-.fin # Function size
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; CHECK-FUNC-NEXT: .vbyte 4, L..fin0-.fin[PR] # Function size
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; COMMON-NEXT: .vbyte 2, 0x0003 # Function name len = 3
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; COMMON-NEXT: .byte "fin" # Function Name
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; COMMON-NEXT: .byte 0x00 # NumOfVRsSaved = 0, -IsVRSavedOnStack, -HasVarArgs
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; COMMON-NEXT: .byte 0x01 # NumOfVectorParams = 0, +HasVMXInstruction
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; COMMON-NEXT: .vbyte 4, 0x00000000 # Vector Parameter type =
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; COMMON-NEXT: .vbyte 2, 0x0000 # Padding
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