forked from OSchip/llvm-project
166 lines
5.6 KiB
C++
166 lines
5.6 KiB
C++
//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#include "X86TargetAsmInfo.h"
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#include "X86TargetMachine.h"
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#include "X86.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include "llvm/Transforms/Scalar.h"
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#include <iostream>
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using namespace llvm;
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/// X86TargetMachineModule - Note that this is used on hosts that cannot link
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/// in a library unless there are references into the library. In particular,
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/// it seems that it is not possible to get things to work on Win32 without
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/// this. Though it is unused, do not remove it.
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extern "C" int X86TargetMachineModule;
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int X86TargetMachineModule = 0;
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namespace {
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// Register the target.
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RegisterTarget<X86_32TargetMachine>
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X("x86", " 32-bit X86: Pentium-Pro and above");
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RegisterTarget<X86_64TargetMachine>
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Y("x86-64", " 64-bit X86: EM64T and AMD64");
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}
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const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
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return new X86TargetAsmInfo(*this);
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}
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unsigned X86_32TargetMachine::getJITMatchQuality() {
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#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
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return 10;
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#endif
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return 0;
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}
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unsigned X86_64TargetMachine::getJITMatchQuality() {
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#if defined(__x86_64__)
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return 10;
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#endif
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return 0;
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}
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unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
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// We strongly match "i[3-9]86-*".
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
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TT[4] == '-' && TT[1] - '3' < 6)
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return 20;
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if (M.getEndianness() == Module::LittleEndian &&
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M.getPointerSize() == Module::Pointer32)
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return 10; // Weak match
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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return getJITMatchQuality()/2;
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}
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unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
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// We strongly match "x86_64-*".
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
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TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
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return 20;
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if (M.getEndianness() == Module::LittleEndian &&
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M.getPointerSize() == Module::Pointer64)
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return 10; // Weak match
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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return getJITMatchQuality()/2;
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}
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X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
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: X86TargetMachine(M, FS, false) {
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}
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X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
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: X86TargetMachine(M, FS, true) {
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}
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/// X86TargetMachine ctor - Create an ILP32 architecture model
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///
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X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, bool is64Bit)
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: Subtarget(M, FS, is64Bit),
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DataLayout(Subtarget.is64Bit() ?
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std::string("e-p:64:64-d:32-l:32") :
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std::string("e-p:32:32-d:32-l:32")),
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FrameInfo(TargetFrameInfo::StackGrowsDown,
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Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
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InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
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if (getRelocationModel() == Reloc::Default)
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if (Subtarget.isTargetDarwin())
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setRelocationModel(Reloc::DynamicNoPIC);
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else
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setRelocationModel(Reloc::PIC_);
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if (Subtarget.is64Bit()) {
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// No DynamicNoPIC support under X86-64.
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if (getRelocationModel() == Reloc::DynamicNoPIC)
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setRelocationModel(Reloc::PIC_);
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// Default X86-64 code model is small.
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if (getCodeModel() == CodeModel::Default)
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setCodeModel(CodeModel::Small);
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}
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}
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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bool X86TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
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// Install an instruction selector.
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PM.add(createX86ISelDag(*this, Fast));
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return false;
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}
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bool X86TargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
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PM.add(createX86FloatingPointStackifierPass());
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return true; // -print-machineinstr should print after this.
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}
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bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
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std::ostream &Out) {
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PM.add(createX86CodePrinterPass(Out, *this));
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return false;
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}
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bool X86TargetMachine::addObjectWriter(FunctionPassManager &PM, bool Fast,
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std::ostream &Out) {
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if (Subtarget.isTargetELF()) {
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addX86ELFObjectWriterPass(PM, Out, *this);
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return false;
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}
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return true;
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}
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bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
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MachineCodeEmitter &MCE) {
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// FIXME: Move this to TargetJITInfo!
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setRelocationModel(Reloc::Static);
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PM.add(createX86CodeEmitterPass(*this, MCE));
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return false;
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}
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