forked from OSchip/llvm-project
44 lines
1.9 KiB
LLVM
44 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
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; Only bottom 16 bits are set - upper 48 bits are zero.
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define <2 x i64> @combine_psadbw_shift(<16 x i8> %0, <16 x i8> %1) {
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; CHECK-LABEL: combine_psadbw_shift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%3 = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %0, <16 x i8> %1)
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%4 = lshr <2 x i64> %3, <i64 48, i64 48>
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ret <2 x i64> %4
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}
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; Propagate the demanded result elements to the 8 aliasing source elements.
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define i64 @combine_psadbw_demandedelt(<16 x i8> %0, <16 x i8> %1) {
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; X86-LABEL: combine_psadbw_demandedelt:
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; X86: # %bb.0:
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
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; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,3,2]
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; X86-NEXT: psadbw %xmm0, %xmm1
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; X86-NEXT: movd %xmm1, %eax
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
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; X86-NEXT: movd %xmm0, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: combine_psadbw_demandedelt:
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; X64: # %bb.0:
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
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; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,3,2]
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; X64-NEXT: psadbw %xmm0, %xmm1
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; X64-NEXT: movq %xmm1, %rax
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; X64-NEXT: retq
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%3 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11>
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%4 = shufflevector <16 x i8> %1, <16 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11>
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%5 = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %3, <16 x i8> %4)
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%6 = extractelement <2 x i64> %5, i32 0
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ret i64 %6
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}
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declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>)
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