forked from OSchip/llvm-project
dfda9dcc1d
Summary: Distinguish two relationships between types: is-a and convertible-to. For example, a bit is not an int or vice versa, but they can be converted into each other (with range checks that you can think of as "dynamic": unlike other type checks, those range checks do not happen during parsing, but only once the final values have been established). Actually converting initializers between types is subtle: even when values of type A can be converted to type B (e.g. int into string), it may not be possible to do so with a concrete initializer (e.g., a VarInit that refers to a variable of type int cannot be immediately converted to a string). For this reason, distinguish between getCastTo and convertInitializerTo: the latter implements the actual conversion when appropriate, while the former will first try to do the actual conversion and fall back to introducing a !cast operation so that the conversion will be delayed until variable references have been resolved. To make the approach of adding !cast operations to work, !cast needs to fallback to convertInitializerTo when the special string <-> record logic does not apply. This enables casting records to a subclass, although that new functionality is only truly useful together with !isa, which will be added in a later change. The test is removed because it uses !srl on a bit sequence, which cannot really be supported consistently, but luckily isn't used anywhere either. Change-Id: I98168bf52649176654ed2ec61a29bdb29970cfe7 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43753 llvm-svn: 326785 |
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| .. | ||
| 2003-08-03-PassCode.td | ||
| 2006-09-18-LargeInt.td | ||
| 2010-03-24-PrematureDefaults.td | ||
| AllowDuplicateRegisterNames.td | ||
| AnonDefinitionOnDemand.td | ||
| AsmPredicateCondsEmission.td | ||
| AsmVariant.td | ||
| BitOffsetDecoder.td | ||
| BitsInit.td | ||
| BitsInitOverflow.td | ||
| CStyleComment.td | ||
| ClassInstanceValue.td | ||
| ConcatenatedSubregs.td | ||
| Dag.td | ||
| DefmInherit.td | ||
| DefmInsideMultiClass.td | ||
| DuplicateFieldValues.td | ||
| FieldAccess.td | ||
| ForeachList.td | ||
| ForeachLoop.td | ||
| ForwardRef.td | ||
| GeneralList.td | ||
| GlobalISelEmitter.td | ||
| HwModeSelect.td | ||
| Include.inc | ||
| Include.td | ||
| IntBitInit.td | ||
| LazyChange.td | ||
| LetInsideMultiClasses.td | ||
| ListArgs.td | ||
| ListArgsSimple.td | ||
| ListConversion.td | ||
| ListManip.td | ||
| ListOfList.td | ||
| ListSlices.td | ||
| LoLoL.td | ||
| MultiClass-defm-fail.td | ||
| MultiClass-defm.td | ||
| MultiClass.td | ||
| MultiClassDefName.td | ||
| MultiClassInherit.td | ||
| MultiPat.td | ||
| NestedForeach.td | ||
| Paste.td | ||
| RegisterBankEmitter.td | ||
| RegisterEncoder.td | ||
| RelTest.td | ||
| SetTheory.td | ||
| SiblingForeach.td | ||
| Slice.td | ||
| String.td | ||
| SuperSubclassSameName.td | ||
| TargetInstrInfo.td | ||
| TargetInstrSpec.td | ||
| TemplateArgRename.td | ||
| Tree.td | ||
| TreeNames.td | ||
| TwoLevelName.td | ||
| UnsetBitInit.td | ||
| UnterminatedComment.td | ||
| ValidIdentifiers.td | ||
| cast-list-initializer.td | ||
| cast.td | ||
| code.td | ||
| defmclass.td | ||
| eq.td | ||
| eqbit.td | ||
| foreach-eval.td | ||
| foreach-leak.td | ||
| foreach.td | ||
| if-empty-list-arg.td | ||
| if-type.td | ||
| if.td | ||
| ifbit.td | ||
| intrinsic-long-name.td | ||
| intrinsic-struct.td | ||
| intrinsic-varargs.td | ||
| lisp.td | ||
| list-element-bitref.td | ||
| listconcat.td | ||
| lit.local.cfg | ||
| math.td | ||
| nested-comment.td | ||
| pr8330.td | ||
| size.td | ||
| strconcat.td | ||
| subst.td | ||
| subst2.td | ||
| template-arg-dependency.td | ||
| trydecode-emission.td | ||
| trydecode-emission2.td | ||
| trydecode-emission3.td | ||
| usevalname.td | ||