forked from OSchip/llvm-project
68 lines
2.8 KiB
Plaintext
68 lines
2.8 KiB
Plaintext
//RUN: %clang_cc1 %s -triple spir -emit-llvm -O0 -o - | FileCheck %s
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enum E {
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a,
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b,
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};
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class C {
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public:
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void Assign(E e) { me = e; }
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void OrAssign(E e) { mi |= e; }
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E me;
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int mi;
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};
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__global E globE;
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volatile __global int globVI;
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__global int globI;
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//CHECK-LABEL: define{{.*}} spir_func void @_Z3barv()
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void bar() {
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C c;
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//CHECK: [[A1:%[.a-z0-9]+]] ={{.*}} addrspacecast %class.C* [[C:%[a-z0-9]+]] to %class.C addrspace(4)*
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//CHECK: call spir_func void @_ZNU3AS41C6AssignE1E(%class.C addrspace(4)* {{[^,]*}} [[A1]], i32 0)
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c.Assign(a);
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//CHECK: [[A2:%[.a-z0-9]+]] ={{.*}} addrspacecast %class.C* [[C]] to %class.C addrspace(4)*
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//CHECK: call spir_func void @_ZNU3AS41C8OrAssignE1E(%class.C addrspace(4)* {{[^,]*}} [[A2]], i32 0)
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c.OrAssign(a);
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E e;
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//CHECK: store i32 1, i32* %e
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e = b;
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//CHECK: store i32 0, i32 addrspace(1)* @globE
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globE = a;
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//CHECK: store i32 %or, i32 addrspace(1)* @globI
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globI |= b;
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//CHECK: store i32 %add, i32 addrspace(1)* @globI
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globI += a;
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//CHECK: [[GVIV1:%[0-9]+]] = load volatile i32, i32 addrspace(1)* @globVI
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//CHECK: [[AND:%[a-z0-9]+]] = and i32 [[GVIV1]], 1
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//CHECK: store volatile i32 [[AND]], i32 addrspace(1)* @globVI
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globVI &= b;
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//CHECK: [[GVIV2:%[0-9]+]] = load volatile i32, i32 addrspace(1)* @globVI
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//CHECK: [[SUB:%[a-z0-9]+]] = sub nsw i32 [[GVIV2]], 0
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//CHECK: store volatile i32 [[SUB]], i32 addrspace(1)* @globVI
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globVI -= a;
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}
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//CHECK: define linkonce_odr spir_func void @_ZNU3AS41C6AssignE1E(%class.C addrspace(4)* {{[^,]*}} {{[ %a-z0-9]*}}, i32{{[ %a-z0-9]*}})
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//CHECK: [[THIS_ADDR:%[.a-z0-9]+]] = alloca %class.C addrspace(4)
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//CHECK: [[E_ADDR:%[.a-z0-9]+]] = alloca i32
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//CHECK: store %class.C addrspace(4)* {{%[a-z0-9]+}}, %class.C addrspace(4)** [[THIS_ADDR]]
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//CHECK: store i32 {{%[a-z0-9]+}}, i32* [[E_ADDR]]
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//CHECK: [[THIS1:%[.a-z0-9]+]] = load %class.C addrspace(4)*, %class.C addrspace(4)** [[THIS_ADDR]]
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//CHECK: [[E:%[0-9]+]] = load i32, i32* [[E_ADDR]]
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//CHECK: [[ME:%[a-z0-9]+]] = getelementptr inbounds %class.C, %class.C addrspace(4)* [[THIS1]], i32 0, i32 0
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//CHECK: store i32 [[E]], i32 addrspace(4)* [[ME]]
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//CHECK: define linkonce_odr spir_func void @_ZNU3AS41C8OrAssignE1E(%class.C addrspace(4)* {{[^,]*}} {{[ %a-z0-9]*}}, i32{{[ %a-z0-9]*}})
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//CHECK: [[THIS_ADDR:%[.a-z0-9]+]] = alloca %class.C addrspace(4)
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//CHECK: [[E_ADDR:%[.a-z0-9]+]] = alloca i32
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//CHECK: store %class.C addrspace(4)* {{%[a-z0-9]+}}, %class.C addrspace(4)** [[THIS_ADDR]]
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//CHECK: store i32 {{%[a-z0-9]+}}, i32* [[E_ADDR]]
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//CHECK: [[THIS1:%[.a-z0-9]+]] = load %class.C addrspace(4)*, %class.C addrspace(4)** [[THIS_ADDR]]
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//CHECK: [[E:%[0-9]+]] = load i32, i32* [[E_ADDR]]
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//CHECK: [[MI_GEP:%[a-z0-9]+]] = getelementptr inbounds %class.C, %class.C addrspace(4)* [[THIS1]], i32 0, i32 1
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//CHECK: [[MI:%[0-9]+]] = load i32, i32 addrspace(4)* [[MI_GEP]]
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//CHECK: %or = or i32 [[MI]], [[E]]
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