forked from OSchip/llvm-project
40 lines
1.2 KiB
LLVM
40 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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@src = global i32 0
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@dst = global i32 0
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; Tests that the common hi20 value (1) for the constants is used rather than
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; redundantly re-materialised.
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define void @imm32_cse() nounwind {
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; RV32I-LABEL: imm32_cse:
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; RV32I: # %bb.0:
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; RV32I-NEXT: lui a0, 1
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; RV32I-NEXT: addi a1, a0, 1
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; RV32I-NEXT: lui a2, %hi(src)
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; RV32I-NEXT: lw a3, %lo(src)(a2)
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; RV32I-NEXT: add a1, a3, a1
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; RV32I-NEXT: lui a3, %hi(dst)
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; RV32I-NEXT: sw a1, %lo(dst)(a3)
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; RV32I-NEXT: addi a1, a0, 2
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; RV32I-NEXT: lw a4, %lo(src)(a2)
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; RV32I-NEXT: add a1, a4, a1
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; RV32I-NEXT: sw a1, %lo(dst)(a3)
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; RV32I-NEXT: addi a0, a0, 3
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; RV32I-NEXT: lw a1, %lo(src)(a2)
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; RV32I-NEXT: add a0, a1, a0
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; RV32I-NEXT: sw a0, %lo(dst)(a3)
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; RV32I-NEXT: ret
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%1 = load volatile i32, i32* @src
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%2 = add i32 %1, 4097
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store volatile i32 %2, i32* @dst
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%3 = load volatile i32, i32* @src
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%4 = add i32 %3, 4098
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store volatile i32 %4, i32* @dst
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%5 = load volatile i32, i32* @src
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%6 = add i32 %5, 4099
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store volatile i32 %6, i32* @dst
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ret void
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}
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