forked from OSchip/llvm-project
97684419e8
Summary:
Base and offset are always separated when a GlobalAddress node is lowered
(rL332641) as an optimization to reduce instruction count. However, this
optimization is not profitable if the Global Address ends up being used in only
instruction.
This patch adds peephole optimizations that merge an offset of
an address calculation into the LUI %%hi and ADD %lo of the lowering sequence.
The peephole handles three patterns:
1) ADDI (ADDI (LUI %hi(global)) %lo(global)), offset
--->
ADDI (LUI %hi(global + offset)) %lo(global + offset).
This generates:
lui a0, hi (global + offset)
add a0, a0, lo (global + offset)
Instead of
lui a0, hi (global)
addi a0, hi (global)
addi a0, offset
This pattern is for cases when the offset is small enough to fit in the
immediate filed of ADDI (less than 12 bits).
2) ADD ((ADDI (LUI %hi(global)) %lo(global)), (LUI hi_offset))
--->
offset = hi_offset << 12
ADDI (LUI %hi(global + offset)) %lo(global + offset)
Which generates the ASM:
lui a0, hi(global + offset)
addi a0, lo(global + offset)
Instead of:
lui a0, hi(global)
addi a0, lo(global)
lui a1, (offset)
add a0, a0, a1
This pattern is for cases when the offset doesn't fit in an immediate field
of ADDI but the lower 12 bits are all zeros.
3) ADD ((ADDI (LUI %hi(global)) %lo(global)), (ADDI lo_offset, (LUI hi_offset)))
--->
offset = global + offhi20<<12 + offlo12
ADDI (LUI %hi(global + offset)) %lo(global + offset)
Which generates the ASM:
lui a1, %hi(global + offset)
addi a1, %lo(global + offset)
Instead of:
lui a0, hi(global)
addi a0, lo(global)
lui a1, (offhi20)
addi a1, (offlo12)
add a0, a0, a1
This pattern is for cases when the offset doesn't fit in an immediate field
of ADDI and both the lower 1 bits and high 20 bits are non zero.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, apazos,
niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang
llvm-svn: 333455
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| .. | ||
| addc-adde-sube-subc.ll | ||
| align.ll | ||
| alloca.ll | ||
| alu32.ll | ||
| analyze-branch.ll | ||
| bare-select.ll | ||
| blockaddress.ll | ||
| branch-relaxation.ll | ||
| branch.ll | ||
| bswap-ctlz-cttz-ctpop.ll | ||
| byval.ll | ||
| calling-conv-sext-zext.ll | ||
| calling-conv.ll | ||
| calls.ll | ||
| compress-inline-asm.ll | ||
| compress.ll | ||
| disable-tail-calls.ll | ||
| div.ll | ||
| double-arith.ll | ||
| double-br-fcmp.ll | ||
| double-calling-conv.ll | ||
| double-convert.ll | ||
| double-fcmp.ll | ||
| double-imm.ll | ||
| double-intrinsics.ll | ||
| double-mem.ll | ||
| double-previous-failure.ll | ||
| double-select-fcmp.ll | ||
| double-stack-spill-restore.ll | ||
| float-arith.ll | ||
| float-br-fcmp.ll | ||
| float-convert.ll | ||
| float-fcmp.ll | ||
| float-imm.ll | ||
| float-mem.ll | ||
| float-select-fcmp.ll | ||
| fp128.ll | ||
| frame.ll | ||
| frameaddr-returnaddr.ll | ||
| get-setcc-result-type.ll | ||
| hoist-global-addr-base.ll | ||
| i32-icmp.ll | ||
| imm-cse.ll | ||
| imm.ll | ||
| indirectbr.ll | ||
| init-array.ll | ||
| inline-asm.ll | ||
| jumptable.ll | ||
| large-stack.ll | ||
| lit.local.cfg | ||
| lsr-legaladdimm.ll | ||
| mem.ll | ||
| mul.ll | ||
| musttail-call.ll | ||
| option-norvc.ll | ||
| option-rvc.ll | ||
| rem.ll | ||
| remat.ll | ||
| rotl-rotr.ll | ||
| select-cc.ll | ||
| sext-zext-trunc.ll | ||
| shifts.ll | ||
| tail-calls.ll | ||
| vararg.ll | ||
| wide-mem.ll | ||
| zext-with-load-is-free.ll | ||