forked from OSchip/llvm-project
63 lines
2.1 KiB
LLVM
63 lines
2.1 KiB
LLVM
; RUN: opt %loadPolly -polly-codegen -polly-allow-nonaffine-loops \
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; RUN: -S < %s | FileCheck %s
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; This test verifies that values defined in another scop statement and used by
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; PHI-nodes in non-affine regions are code generated correctly.
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; CHECK: polly.stmt.bb3.entry:
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; CHECK-NEXT: %j.0.phiops.reload = load i64, i64* %j.0.phiops
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; CHECK-NEXT: br label %polly.stmt.bb3
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; CHECK: polly.stmt.bb3:
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; CHECK-NEXT: %polly.subregion.iv = phi i32 [ %polly.subregion.iv.inc, %polly.stmt.bb9 ], [ 0, %polly.stmt.bb3.entry ]
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; CHECK-NEXT: %polly.j.0 = phi i64 [ %j.0.phiops.reload, %polly.stmt.bb3.entry ], [ %p_tmp10, %polly.stmt.bb9 ]
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; void foo(long A[], float B[], long *x) {
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; for (long i = 0; i < 1024; i++)
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; for (long j = *x; j < i * i; j++)
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; B[42]++;
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @foo(i64* %A, float* %B, i64* %xptr) {
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bb:
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br label %bb1
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bb1: ; preds = %bb12, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp13, %bb12 ]
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%exitcond = icmp ne i64 %i.0, 1024
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br i1 %exitcond, label %bb2, label %bb14
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bb2: ; preds = %bb1
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%x = load i64, i64* %xptr
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br label %bb3
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bb3: ; preds = %bb9, %bb2
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%j.0 = phi i64 [ %x, %bb2 ], [ %tmp10, %bb9 ]
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%tmp = mul nsw i64 %i.0, %i.0
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%tmp4 = icmp slt i64 %j.0, %tmp
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br i1 %tmp4, label %bb5, label %bb11
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bb5: ; preds = %bb3
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%tmp6 = getelementptr inbounds float, float* %B, i64 42
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%tmp7 = load float, float* %tmp6, align 4
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%tmp8 = fadd float %tmp7, 1.000000e+00
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store float %tmp8, float* %tmp6, align 4
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br label %bb9
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bb9: ; preds = %bb5
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%tmp10 = add nuw nsw i64 %j.0, 1
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br label %bb3
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bb11: ; preds = %bb3
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br label %bb12
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bb12: ; preds = %bb11
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%tmp13 = add nuw nsw i64 %i.0, 1
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br label %bb1
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bb14: ; preds = %bb1
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ret void
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}
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