forked from OSchip/llvm-project
49 lines
1.5 KiB
ArmAsm
49 lines
1.5 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc --arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
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// RUN: ld.lld %t -o %t2
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// RUN: llvm-objdump -d %t2 | FileCheck %s
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/// Check that the ARM ABI rules for undefined weak symbols are applied.
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/// Branch instructions are resolved to the next instruction. Relative
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/// relocations are resolved to the place.
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.syntax unified
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.weak target
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.type target, %function
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.text
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.global _start
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_start:
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/// R_ARM_THM_JUMP19
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beq.w target
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/// R_ARM_THM_JUMP24
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b.w target
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/// R_ARM_THM_CALL
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bl target
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/// R_ARM_THM_CALL with exchange
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blx target
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/// R_ARM_THM_MOVT_PREL
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movt r0, :upper16:target - .
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/// R_ARM_THM_MOVW_PREL_NC
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movw r0, :lower16:target - .
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/// R_ARM_THM_ALU_PREL_11_0
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/// adr r0, target
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.inst.w 0xf2af0004
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.reloc 0x18, R_ARM_THM_ALU_PREL_11_0, target
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/// R_ARM_THM_PC12
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/// ldr r0, target
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.inst.w 0xf85f0004
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.reloc 0x1c, R_ARM_THM_PC12, target
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// CHECK: Disassembly of section .text:
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// CHECK-EMPTY:
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// CHECK: 200b4: {{.*}} beq.w 0x200b8 <_start+0x4> @ imm = #0
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// CHECK-NEXT: 200b8: {{.*}} b.w 0x200bc <_start+0x8> @ imm = #0
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// CHECK-NEXT: 200bc: {{.*}} bl 0x200c0 <_start+0xc> @ imm = #0
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/// blx is transformed into bl so we don't change state
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// CHECK-NEXT: 200c0: {{.*}} bl 0x200c4 <_start+0x10> @ imm = #0
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// CHECK-NEXT: 200c4: {{.*}} movt r0, #0
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// CHECK-NEXT: 200c8: {{.*}} movw r0, #0
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// CHECK-NEXT: 200cc: {{.*}} adr.w r0, #-4
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// CHECK-NEXT: 200d0: {{.*}} ldr.w r0, [pc, #-4]
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