forked from OSchip/llvm-project
86 lines
3.3 KiB
ArmAsm
86 lines
3.3 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
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// RUN: echo "SECTIONS {" > %t.script
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// RUN: echo " .text_low 0x130 : { *(.text) }" >> %t.script
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// RUN: echo " .text_high 0xf0000000 : AT(0x1000) { *(.text_high) }" >> %t.script
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// RUN: echo " } " >> %t.script
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// RUN: ld.lld --script %t.script --pie --static %t -o %t2
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// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi --no-show-raw-insn %t2 | FileCheck %s
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t3
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// RUN: ld.lld --script %t.script --pie %t3 -o %t4
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// RUN: llvm-objdump -d --no-show-raw-insn %t4 | FileCheck --check-prefix=CHECK-THUMB %s
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// Check that we can create Arm and Thumb v7a Position Independent Thunks that
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// can span the address space without triggering overflow errors. We use an
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// AT(0x1000) for .text_high to avoid creating an almost 4Gb size file.
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.syntax unified
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.text
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.global _start
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.type _start, %function
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_start:
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bl high
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bx lr
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.section .text_high, "ax", %progbits
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.global high
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.type high, %function
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high:
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bl _start
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bx lr
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// ARMv7a instructions and relocations.
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// CHECK: Disassembly of section .text_low:
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// CHECK-EMPTY:
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// CHECK-NEXT: <_start>:
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// CHECK-NEXT: 130: bl 0x138 <__ARMV7PILongThunk_high>
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// CHECK-NEXT: 134: bx lr
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// CHECK: <__ARMV7PILongThunk_high>:
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// CHECK-NEXT: 138: movw r12, #65208
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// CHECK-NEXT: 13c: movt r12, #61439
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// 0x140 + 0xEFFF0000 + 0x0000FEB8 + 8 = 0xf0000000 = high
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// CHECK-NEXT: 140: add r12, r12, pc
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// CHECK-NEXT: 144: bx r12
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// CHECK: Disassembly of section .text_high:
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// CHECK-EMPTY:
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// CHECK-NEXT: <high>:
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// CHECK-NEXT: f0000000: bl 0xf0000008 <__ARMV7PILongThunk__start>
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// CHECK-NEXT: f0000004: bx lr
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// CHECK: <__ARMV7PILongThunk__start>:
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// CHECK-NEXT: f0000008: movw r12, #280
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// CHECK-NEXT: f000000c: movt r12, #4096
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// 0xf0000010 + 0x10000000 + 0x0000118 + 8 = bits32(0x100000130),0x130 = _start
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// CHECK-NEXT: f0000010: add r12, r12, pc
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// CHECK-NEXT: f0000014: bx r12
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// Thumbv7a instructions and relocations
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// CHECK-THUMB: Disassembly of section .text_low:
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// CHECK-THUMB-EMPTY:
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// CHECK-THUMB-NEXT: <_start>:
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// CHECK-THUMB-NEXT: 130: bl 0x138 <__ThumbV7PILongThunk_high>
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// CHECK-THUMB-NEXT: 134: bx lr
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// CHECK-THUMB: <__ThumbV7PILongThunk_high>:
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// CHECK-THUMB-NEXT: 138: movw r12, #65213
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// CHECK-THUMB-NEXT: 13c: movt r12, #61439
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// 0x140 + 0xEFFF0000 + 0x0000FEBD + 4 = 0xf0000001 = high
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// CHECK-THUMB-NEXT: 140: add r12, pc
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// CHECK-THUMB-NEXT: 142: bx r12
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// CHECK-THUMB: Disassembly of section .text_high:
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// CHECK-THUMB-EMPTY:
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// CHECK-THUMB-NEXT: <high>:
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// CHECK-THUMB-NEXT: f0000000: bl 0xf0000008 <__ThumbV7PILongThunk__start>
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// CHECK-THUMB-NEXT: f0000004: bx lr
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// CHECK-THUMB: <__ThumbV7PILongThunk__start>:
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// CHECK-THUMB-NEXT: f0000008: movw r12, #285
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// CHECK-THUMB-NEXT: f000000c: movt r12, #4096
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// 0xf0000010 + 0x10000000 + 0x000011d +4 = bits32(0x100000131),0x131 = _start
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// CHECK-THUMB-NEXT: f0000010: add r12, pc
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// CHECK-THUMB-NEXT: f0000012: bx r12
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