Nico Weber 4c5c02a448 Revert r305382, it caused PR33513. ... llvm-svn: 305735		2017-06-19 19:48:59 +00:00
..
AArch64	Add test for store merge with noimplicitfloat	2017-06-19 15:18:20 +00:00
AMDGPU	AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal	2017-06-19 13:15:45 +00:00
ARM	[ARM] GlobalISel: Support G_ICMP for s8 and s16	2017-06-19 11:47:28 +00:00
AVR	[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi	2017-05-31 06:27:46 +00:00
BPF	bpf: avoid load from read-only sections	2017-06-16 15:41:16 +00:00
Generic	CodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCI	2017-06-06 00:26:13 +00:00
Hexagon	[Hexagon] Don't kill live registers when creating mux out of tfr	2017-06-16 12:24:03 +00:00
Inputs	…
Lanai	CodeGen: Rename DEBUG_TYPE to match passnames	2017-05-25 21:26:32 +00:00
MIR	llc: Add ability to parse mir from stdin	2017-06-06 20:06:57 +00:00
MSP430	[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.	2017-05-24 15:08:30 +00:00
Mips	Revert r305382, it caused PR33513.	2017-06-19 19:48:59 +00:00
NVPTX	Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."	2017-05-18 18:50:05 +00:00
Nios2	[Nios2] Target registration	2017-05-29 09:48:30 +00:00
PowerPC	[CGP, PowerPC] try to constant fold before creating loads for memcmp expansion	2017-06-19 19:48:35 +00:00
SPARC	Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."	2017-05-18 18:50:05 +00:00
SystemZ	[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno	2017-06-12 17:15:41 +00:00
Thumb	RegScavenging: Add scavengeRegisterBackwards()	2017-06-17 02:08:18 +00:00
Thumb2	MIR: remove explicit "noVRegs" property.	2017-05-30 21:28:57 +00:00
WebAssembly	[WebAssembly] Use __stack_pointer global when writing wasm binary	2017-06-16 23:59:10 +00:00
WinEH	…
X86	Revert r304824 "Fix PR23384 (part 3 of 3)"	2017-06-19 17:57:15 +00:00
XCore	AsmPrinter: mark the beginning and the end of a function in verbose mode	2017-05-23 21:22:16 +00:00