llvm-project/llvm/test/Transforms/IRCE
Max Kazantsev 2f6ae28152 [IRCE] Handle loops with step different from 1/-1
This patch generalizes IRCE to handle IV steps that are not equal to 1 or -1.

Differential Revision: https://reviews.llvm.org/D35539

llvm-svn: 310032
2017-08-04 07:01:04 +00:00
..
add-metadata-pre-post-loops.ll
bad-loop-structure.ll
bug-loop-varying-upper-limit.ll
bug-mismatched-types.ll
conjunctive-checks.ll
correct-loop-info.ll [IRCE] Canonicalize pre/post loops after the blocks are added into parent loop 2017-06-06 14:54:01 +00:00
decrementing-loop.ll
eq_ne.ll [IRCE] Recognize loops with unsigned latch conditions 2017-08-04 05:40:20 +00:00
low-becount.ll
multiple-access-no-preloop.ll
not-likely-taken.ll
only-lower-check.ll
only-upper-check.ll
pre_post_loops.ll [IRCE] Fix corner case with Start = INT_MAX 2017-07-14 06:35:03 +00:00
single-access-no-preloop.ll
single-access-with-preloop.ll
skip-profitability-checks.ll
stride_more_than_1.ll [IRCE] Handle loops with step different from 1/-1 2017-08-04 07:01:04 +00:00
unhandled.ll
unsigned_comparisons_ugt.ll [IRCE] Recognize loops with unsigned latch conditions 2017-08-04 05:40:20 +00:00
unsigned_comparisons_ult.ll [IRCE] Recognize loops with unsigned latch conditions 2017-08-04 05:40:20 +00:00
with-parent-loops.ll