forked from OSchip/llvm-project
129 lines
4.0 KiB
YAML
129 lines
4.0 KiB
YAML
# RUN: llc -mtriple=aarch64-apple-darwin -run-pass=prologepilog \
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# RUN: -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
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# Check that we save LR to a callee-saved register when possible.
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# foo() should use a callee-saved register. However, bar() should not.
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--- |
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define void @foo() #0 {
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ret void
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}
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define void @bar() #0 {
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ret void
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}
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attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" }
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...
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---
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# Make sure that when we outline and a register is available, we
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# use it to save + restore LR instead of SP.
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# Also make sure that we can call functions that require no save as the same
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# outlined function.
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# CHECK: name: foo
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# CHECK-DAG: bb.1
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# CHECK-DAG: $x[[REG:[0-9]+]] = ORRXrs $xzr, $lr, 0
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# CHECK-NEXT: BL
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# CHECK-NEXT: $lr = ORRXrs $xzr, $x[[REG]], 0
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# CHECK-DAG: bb.2
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# CHECK-DAG: $x[[REG]] = ORRXrs $xzr, $lr, 0
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# CHECK-NEXT: BL
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# CHECK-NEXT: $lr = ORRXrs $xzr, $x[[REG]], 0
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# CHECK-DAG: bb.3
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# CHECK-DAG: $x[[REG]] = ORRXrs $xzr, $lr, 0
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# CHECK-NEXT: BL
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# CHECK-NEXT: $lr = ORRXrs $xzr, $x[[REG]], 0
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# CHECK-DAG: bb.4
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# CHECK-NOT: $x[[REG]] = ORRXrs $xzr, $lr, 0
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# CHECK-DAG: BL
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name: foo
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tracksRegLiveness: true
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fixedStack:
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body: |
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bb.0:
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$x25 = ORRXri $xzr, 1
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$lr = ORRXri $xzr, 1
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bb.1:
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liveins: $lr, $w9
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 2
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bb.2:
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liveins: $lr, $w9
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 2
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bb.3:
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liveins: $lr, $w9
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 2
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bb.4:
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liveins: $lr, $w9
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 1
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$w9 = ORRWri $wzr, 2
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bb.5:
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liveins: $w9
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RET undef $lr
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...
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---
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# Convoluted case that shows that we'll still save to the stack when there are
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# no approprate registers available.
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# The live-in lists do not contain x16 or x17 since including them would cause
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# nothing to be outlined.
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# They also deliberately don't contain x18 to show that on Darwin we won't store
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# to that.
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# CHECK-LABEL: name: bar
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# CHECK: early-clobber $sp = STRXpre $lr, $sp, -16
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# CHECK-NEXT: BL
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# CHECK-DAG: early-clobber $sp, $lr = LDRXpost $sp, 16
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# CHECK: early-clobber $sp = STRXpre $lr, $sp, -16
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# CHECK-NEXT: BL
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# CHECK-DAG: early-clobber $sp, $lr = LDRXpost $sp, 16
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# CHECK: early-clobber $sp = STRXpre $lr, $sp, -16
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# CHECK-NEXT: BL
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# CHECK-NEXT: early-clobber $sp, $lr = LDRXpost $sp, 16
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name: bar
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w12 = ORRWri $wzr, 2
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bb.1:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w12 = ORRWri $wzr, 2
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bb.2:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w10 = ORRWri $wzr, 1
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$w12 = ORRWri $wzr, 2
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bb.3:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x19, $x20, $x21, $x22, $x23, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
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RET undef $lr
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