forked from OSchip/llvm-project
124 lines
5.5 KiB
YAML
124 lines
5.5 KiB
YAML
# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
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# RUN: llvm-dwarfdump - | FileCheck %s
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#
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# This is an artificial example of a debug value residing in a composite
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# location with a complex expression. Because the semantics of applying a DWARF
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# expression to a composite location are ill-defined, the compiler should bail
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# out of emitting a location.
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#
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# CHECK: .debug_info contents:
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# CHECK: DW_TAG_variable
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# CHECK-NOT: DW_AT_location
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# CHECK: DW_TAG
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--- |
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; Generated from:
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; typedef float vec2 __attribute__((vector_size(16)));
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; vec2 v();
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; float f() {
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; vec2 vec = v();
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; return vec[0] + vec[1];
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; }
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target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
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target triple = "thumbv7s-apple-ios5.0.0"
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define float @f() local_unnamed_addr #0 !dbg !9 {
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entry:
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%call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
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tail call void @llvm.dbg.value(metadata <4 x float> %call, i64 0, metadata !14, metadata !20), !dbg !21
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%vecext = extractelement <4 x float> %call, i32 0, !dbg !22
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%vecext1 = extractelement <4 x float> %call, i32 1, !dbg !23
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%add = fadd float %vecext, %vecext1, !dbg !24
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ret float %add, !dbg !25
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}
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declare arm_aapcs_vfpcc <4 x float> @v(...) local_unnamed_addr #0
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declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
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attributes #0 = { nounwind readnone }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4}
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!llvm.ident = !{!8}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0 (trunk 286322) (llvm/trunk 286305)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "v.c", directory: "/")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 2}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!8 = !{!"clang version 4.0.0 (trunk 286322) (llvm/trunk 286305)"}
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!9 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 3, type: !10, isLocal: false, isDefinition: true, scopeLine: 3, isOptimized: true, unit: !0, variables: !13)
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!10 = !DISubroutineType(types: !11)
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!11 = !{!12}
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!12 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
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!13 = !{!14}
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!14 = !DILocalVariable(name: "vec", scope: !9, file: !1, line: 4, type: !15)
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!15 = !DIDerivedType(tag: DW_TAG_typedef, name: "vec2", file: !1, line: 1, baseType: !16)
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!16 = !DICompositeType(tag: DW_TAG_array_type, baseType: !12, size: 128, flags: DIFlagVector, elements: !17)
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!17 = !{!18}
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!18 = !DISubrange(count: 4)
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!19 = !DILocation(line: 4, column: 13, scope: !9)
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!20 = !DIExpression(DW_OP_plus_uconst, 1, DW_OP_constu, 1, DW_OP_minus)
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!21 = !DILocation(line: 4, column: 7, scope: !9)
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!22 = !DILocation(line: 5, column: 9, scope: !9)
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!23 = !DILocation(line: 5, column: 18, scope: !9)
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!24 = !DILocation(line: 5, column: 16, scope: !9)
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!25 = !DILocation(line: 5, column: 2, scope: !9)
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...
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---
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name: f
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alignment: 1
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13',
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'%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4',
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'%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16',
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'%s17', '%s18', '%s19', '%s20', '%s21', '%s22',
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'%s23', '%s24', '%s25', '%s26', '%s27', '%s28',
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'%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12',
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'%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6',
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'%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11',
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'%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13',
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'%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12',
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'%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15',
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'%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10',
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'%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ]
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 4
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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stack:
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- { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' }
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body: |
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bb.0.entry:
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liveins: %lr
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early-clobber %sp = frame-setup t2STR_PRE killed undef %lr, %sp, -4, 14, _
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frame-setup CFI_INSTRUCTION def_cfa_offset 4
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frame-setup CFI_INSTRUCTION offset %lr, -4
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tBL 14, _, @v, csr_ios, implicit-def dead %lr, implicit %sp, implicit-def %sp, implicit-def %r0, implicit-def %r1, implicit-def %r2, implicit-def %r3, debug-location !19
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%d1 = VMOVDRR killed %r2, killed %r3, 14, _, implicit-def %q0, debug-location !19
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%d0 = VMOVDRR killed %r0, killed %r1, 14, _, implicit killed %q0, implicit-def %q0, debug-location !19
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DBG_VALUE debug-use %q0, debug-use _, !14, !20, debug-location !21
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%s4 = VMOVS %s1, 14, _, implicit-def %d2, debug-location !24
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%d0 = VADDfd %d0, killed %d2, 14, _, implicit killed %q0, debug-location !24
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%r0 = VMOVRS %s0, 14, _, implicit killed %d0, debug-location !25
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%lr, %sp = t2LDR_POST %sp, 4, 14, _, debug-location !25
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tBX_RET 14, _, implicit %r0, debug-location !25
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...
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