forked from OSchip/llvm-project
163 lines
4.3 KiB
YAML
163 lines
4.3 KiB
YAML
# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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@x = common global i32 0, align 4
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define void @baz() #0 {
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ret void
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}
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define i32 @main() #0 {
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ret i32 0
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}
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define void @bar(i32 %a) #0 {
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ret void
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}
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attributes #0 = { noinline noredzone "no-frame-pointer-elim"="true" }
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...
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---
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# This test ensures that we
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# - Create outlined functions
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# - Don't outline anything to do with LR or W30
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# - Save LR when it's not available
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# - Don't outline stack instructions when we might need to save + restore
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# - Functions whose addresses are taken can still be outlined
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#
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# CHECK-LABEL: name: main
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# CHECK: BL @OUTLINED_FUNCTION_[[F0:[0-9]+]]
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# CHECK-NEXT: early-clobber %sp, %lr = LDRXpost %sp, 16
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# CHECK-NEXT: %x16 = ADDXri %sp, 48, 0
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# CHECK-NEXT: STRHHroW %w16, %x9, %w30, 1, 1
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# CHECK-NEXT: %lr = ORRXri %xzr, 1
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# CHECK: BL @OUTLINED_FUNCTION_[[F0]]
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# CHECK-NEXT: early-clobber %sp, %lr = LDRXpost %sp, 16
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# CHECK-NEXT: %x16 = ADDXri %sp, 48, 0
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# CHECK-NEXT: STRHHroW %w16, %x9, %w30, 1, 1
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# CHECK-NEXT: %lr = ORRXri %xzr, 1
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# CHECK: BL @OUTLINED_FUNCTION_[[F0]]
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# CHECK-NEXT: early-clobber %sp, %lr = LDRXpost %sp, 16
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# CHECK-NEXT: %x16 = ADDXri %sp, 48, 0
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# CHECK-NEXT: STRHHroW %w16, %x9, %w30, 1, 1
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# CHECK-NEXT: %lr = ORRXri %xzr, 1
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name: main
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tracksRegLiveness: true
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body: |
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bb.0:
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%sp = frame-setup SUBXri %sp, 16, 0
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renamable %x9 = ADRP target-flags(aarch64-page) @bar
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%x9 = ORRXri %xzr, 1
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%w16 = ORRWri %wzr, 1
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%w30 = ORRWri %wzr, 1
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%lr = ORRXri %xzr, 1
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%x20, %x19 = LDPXi %sp, 10
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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renamable %x9 = ADRP target-flags(aarch64-page) @x
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%x16 = ADDXri %sp, 48, 0;
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STRHHroW %w16, %x9, %w30, 1, 1
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%lr = ORRXri %xzr, 1
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%w3 = ORRWri %wzr, 1993
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%x20, %x19 = LDPXi %sp, 10
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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renamable %x9 = ADRP target-flags(aarch64-page) @x
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%x16 = ADDXri %sp, 48, 0;
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STRHHroW %w16, %x9, %w30, 1, 1
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%lr = ORRXri %xzr, 1
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%w4 = ORRWri %wzr, 1994
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%x20, %x19 = LDPXi %sp, 10
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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%w16 = ORRWri %wzr, 1
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renamable %x9 = ADRP target-flags(aarch64-page) @x
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%x16 = ADDXri %sp, 48, 0;
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STRHHroW %w16, %x9, %w30, 1, 1
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%lr = ORRXri %xzr, 1
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%sp = ADDXri %sp, 16, 0
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RET undef %lr
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...
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---
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# This test ensures that we can avoid saving LR when it's available.
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# CHECK-LABEL: bb.1:
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# CHECK-NOT: BL @baz, implicit-def dead %lr, implicit %sp
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# CHECK: BL @OUTLINED_FUNCTION_[[F1:[0-9]+]], implicit-def %lr, implicit %sp
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# CHECK-NEXT: %w17 = ORRWri %wzr, 2
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# CHECK-NEXT: BL @OUTLINED_FUNCTION_[[F1]], implicit-def %lr, implicit %sp
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# CHECK-NEXT: %w8 = ORRWri %wzr, 0
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name: bar
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: %w0, %lr, %w8
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%sp = frame-setup SUBXri %sp, 32, 0
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%fp = frame-setup ADDXri %sp, 16, 0
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bb.1:
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BL @baz, implicit-def dead %lr, implicit %sp
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%w17 = ORRWri %wzr, 1
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%w17 = ORRWri %wzr, 1
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%w17 = ORRWri %wzr, 1
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%w17 = ORRWri %wzr, 1
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BL @baz, implicit-def dead %lr, implicit %sp
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%w17 = ORRWri %wzr, 2
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BL @baz, implicit-def dead %lr, implicit %sp
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%w17 = ORRWri %wzr, 1
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%w17 = ORRWri %wzr, 1
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%w17 = ORRWri %wzr, 1
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%w17 = ORRWri %wzr, 1
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BL @baz, implicit-def dead %lr, implicit %sp
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%w8 = ORRWri %wzr, 0
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bb.2:
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%x15 = ADDXri %sp, 48, 0;
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%w9 = ORRWri %wzr, 0
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%x15 = ADDXri %sp, 48, 0;
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%w8 = ORRWri %wzr, 0
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bb.3:
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%fp, %lr = LDPXi %sp, 2
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%sp = ADDXri %sp, 32, 0
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RET undef %lr
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...
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---
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name: baz
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: %w0, %lr, %w8
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RET undef %lr
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# CHECK-LABEL: name: OUTLINED_FUNCTION_{{[0-9]}}
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# CHECK=LABEL: name: OUTLINED_FUNCTION_{{[1-9]}}
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