forked from OSchip/llvm-project
47 lines
1.5 KiB
TableGen
47 lines
1.5 KiB
TableGen
//===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This files contains patterns that should only be used by GlobalISel. For
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// example patterns for V_* instructions that have S_* equivalents.
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// SelectionDAG does not support selecting V_* instructions.
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//===----------------------------------------------------------------------===//
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include "AMDGPU.td"
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def sd_vsrc0 : ComplexPattern<i32, 1, "">;
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def gi_vsrc0 :
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GIComplexOperandMatcher<s32, "selectVSRC0">,
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GIComplexPatternEquiv<sd_vsrc0>;
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def gi_vop3mods0 :
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GIComplexOperandMatcher<s32, "selectVOP3Mods0">,
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GIComplexPatternEquiv<VOP3Mods0>;
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class GISelSop2Pat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt SReg_32:$src0), (src1_vt SReg_32:$src1))),
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(inst src0_vt:$src0, src1_vt:$src1)
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>;
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class GISelVop2Pat <
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SDPatternOperator node,
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Instruction inst,
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ValueType dst_vt,
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ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
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(dst_vt (node (src0_vt (sd_vsrc0 src0_vt:$src0)), (src1_vt VGPR_32:$src1))),
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(inst src0_vt:$src0, src1_vt:$src1)
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>;
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def : GISelSop2Pat <or, S_OR_B32, i32>;
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def : GISelVop2Pat <or, V_OR_B32_e32, i32>;
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