forked from OSchip/llvm-project
dd030701bd
CopyToReg/CopyFromReg/INLINEASM. These are annoying because
they have the same opcode before an after isel. Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.
With that done, give IsLegalToFold a new flag that causes it to
ignore chains. This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing. This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.
I currently #if out the dead code in the X86 backend and MSP
backend, I'll remove it for real in a follow-on patch.
The testcase changes are:
test/CodeGen/X86/sse3.ll: we generate better code
test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was
miscompiling this before, we now generate correct code
Convert it to filecheck while I'm at it.
test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
folding to make anton happy. :)
llvm-svn: 97596
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||
|---|---|---|
| .. | ||
| AsmPrinter | ||
| TargetInfo | ||
| CMakeLists.txt | ||
| MSP430.h | ||
| MSP430.td | ||
| MSP430BranchSelector.cpp | ||
| MSP430CallingConv.td | ||
| MSP430ISelDAGToDAG.cpp | ||
| MSP430ISelLowering.cpp | ||
| MSP430ISelLowering.h | ||
| MSP430InstrFormats.td | ||
| MSP430InstrInfo.cpp | ||
| MSP430InstrInfo.h | ||
| MSP430InstrInfo.td | ||
| MSP430MCAsmInfo.cpp | ||
| MSP430MCAsmInfo.h | ||
| MSP430MachineFunctionInfo.h | ||
| MSP430RegisterInfo.cpp | ||
| MSP430RegisterInfo.h | ||
| MSP430RegisterInfo.td | ||
| MSP430Subtarget.cpp | ||
| MSP430Subtarget.h | ||
| MSP430TargetMachine.cpp | ||
| MSP430TargetMachine.h | ||
| Makefile | ||
| README.txt | ||
README.txt
//===---------------------------------------------------------------------===// // MSP430 backend. //===---------------------------------------------------------------------===// DISCLAIMER: Thid backend should be considered as highly experimental. I never seen nor worked with this MCU, all information was gathered from datasheet only. The original intention of making this backend was to write documentation of form "How to write backend for dummies" :) Thes notes hopefully will be available pretty soon. Some things are incomplete / not implemented yet (this list surely is not complete as well): 1. Verify, how stuff is handling implicit zext with 8 bit operands (this might be modelled currently in improper way - should we need to mark the superreg as def for every 8 bit instruction?). 2. Libcalls: multiplication, division, remainder. Note, that calling convention for libcalls is incomptible with calling convention of libcalls of msp430-gcc (these cannot be used though due to license restriction). 3. Implement multiplication / division by constant (dag combiner hook?). 4. Implement non-constant shifts. 5. Implement varargs stuff. 6. Verify and fix (if needed) how's stuff playing with i32 / i64. 7. Implement floating point stuff (softfp?) 8. Implement instruction encoding for (possible) direct code emission in the future. 9. Since almost all instructions set flags - implement brcond / select in better way (currently they emit explicit comparison). 10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td) 11. Implement hooks for better memory op folding, etc.