Chandler Carruth 301ed0c3b4 Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation ... This doesn't pass 'ninja check-llvm' for me. Lots of tests, including the ones updated, fail with crashes and other explosions. llvm-svn: 229952		2015-02-20 02:15:36 +00:00
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2008-11-17-Shl64.ll	…
2009-01-08-Crash.ll	…
2009-01-14-Remat-Crash.ll	…
2009-03-27-v2f64-param.ll	…
2009-07-15-store192.ll	…
2010-02-25-LSR-Crash.ll	…
2011-01-31-DAGCombineBug.ll	…
2011-08-01-DynamicAllocBug.ll	…
DbgValueOtherTargets.test	…
addsub64.ll	…
aliases.ll	…
align.ll	…
alignment.ll	…
ashr.ll	…
atomic.ll	Erase fence insertion from SelectionDAGBuilder.cpp (NFC)	2014-10-16 20:34:57 +00:00
basictest.ll	…
bigstructret.ll	[XCore] Support functions returning more than 4 words.	2014-02-27 17:47:54 +00:00
byVal.ll	[XCore] Target optimized library function __memcpy_4()	2014-02-27 13:39:07 +00:00
call.ll	[XCore] Fix call of absolute address.	2014-03-04 16:50:30 +00:00
codemodel.ll	…
constants.ll	…
dwarf_debug.ll	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00
epilogue_prologue.ll	[XCore] Don't create invalid MKMSK instructions inside loadImmediate().	2014-04-14 12:30:35 +00:00
events.ll	…
exception.ll	Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation	2015-02-20 02:15:36 +00:00
float-intrinsics.ll	…
fneg.ll	…
getid.ll	…
globals.ll	…
indirectbr.ll	…
inline-asm.ll	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00
ladd_lsub_combine.ll	…
licm-ldwcp.ll	…
linkage.ll	…
lit.local.cfg	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
llvm-intrinsics.ll	Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"	2014-04-21 17:57:07 +00:00
load.ll	…
memcpy.ll	[XCore] Target optimized library function __memcpy_4()	2014-02-27 13:39:07 +00:00
misc-intrinsics.ll	…
mkmsk.ll	…
mul64.ll	…
offset_folding.ll	…
private.ll	…
ps-intrinsics.ll	…
resources.ll	[XCore] Add intrinsic for CLRPT (clear port time) instruction.	2014-02-25 17:31:15 +00:00
resources_combine.ll	[XCore] Add dag combines for instructions that ignore some input bits.	2014-02-27 13:20:11 +00:00
scavenging.ll	…
sext.ll	…
shedulingPreference.ll	…
sr-intrinsics.ll	…
store.ll	…
switch.ll	…
switch_long.ll	…
threads.ll	…
tls.ll	…
trampoline.ll	…
trap.ll	…
unaligned_load.ll	…
unaligned_store.ll	…
unaligned_store_combine.ll	…
varargs.ll	…
zext.ll	…
zextfree.ll	…