forked from OSchip/llvm-project
76 lines
1.9 KiB
YAML
76 lines
1.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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define float @test_fmul_float(float %arg1, float %arg2) {
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%ret = fmul float %arg1, %arg2
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ret float %ret
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}
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define double @test_fmul_double(double %arg1, double %arg2) {
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%ret = fmul double %arg1, %arg2
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ret double %ret
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}
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...
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---
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name: test_fmul_float
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alignment: 4
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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; CHECK-LABEL: name: test_fmul_float
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %xmm0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY %xmm1
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; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[COPY1]]
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; CHECK: %xmm0 = COPY [[FMUL]](s32)
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; CHECK: RET 0, implicit %xmm0
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%0(s32) = COPY %xmm0
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%1(s32) = COPY %xmm1
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%2(s32) = G_FMUL %0, %1
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%xmm0 = COPY %2(s32)
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RET 0, implicit %xmm0
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...
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---
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name: test_fmul_double
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alignment: 4
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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; CHECK-LABEL: name: test_fmul_double
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY %xmm0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY %xmm1
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; CHECK: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY1]]
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; CHECK: %xmm0 = COPY [[FMUL]](s64)
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; CHECK: RET 0, implicit %xmm0
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%0(s64) = COPY %xmm0
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%1(s64) = COPY %xmm1
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%2(s64) = G_FMUL %0, %1
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%xmm0 = COPY %2(s64)
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RET 0, implicit %xmm0
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...
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