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llvm-project/llvm/test/CodeGen/X86/GlobalISel
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Aditya Nandakumar e6201c8724 [GISel]: Rework legalization algorithm for better elimination of 
artifacts along with DCE

Legalization Artifacts are all those insts that are there to make the
type system happy. Currently, the target needs to say all combinations
of extends and truncs are legal and there's no way of verifying that
post legalization, we only have *truly* legal instructions. This patch
changes roughly the legalization algorithm to process all illegal insts
at one go, and then process all truncs/extends that were added to
satisfy the type constraints separately trying to combine trivial cases
until they converge. This has the added benefit that, the target
legalizerinfo can only say which truncs and extends are okay and the
artifact combiner would combine away other exts and truncs.

Updated legalization algorithm to roughly the following pseudo code.

WorkList Insts, Artifacts;
collect_all_insts_and_artifacts(Insts, Artifacts);

do {
  for (Inst in Insts)
         legalizeInstrStep(Inst, Insts, Artifacts);
  for (Artifact in Artifacts)
         tryCombineArtifact(Artifact, Insts, Artifacts);
} while(!Insts.empty());

Also, wrote a simple wrapper equivalent to SetVector, except for
erasing, it avoids moving all elements over by one and instead just
nulls them out.

llvm-svn: 318210
 		2017-11-14 22:42:19 +00:00
..
GV.ll [GlobalISel][X86] Support G_GLOBAL_VALUE operation. 2017-07-02 08:58:29 +00:00
add-scalar.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
add-vec.ll [GlobalISel][X86] Support vector type G_UNMERGE_VALUES selection. 2017-07-02 08:15:49 +00:00
and-scalar.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
binop.ll
…
br.ll
…
brcond.ll Revert "Correct dwarf unwind information in function epilogue for X86" 2017-11-08 21:31:14 +00:00
callingconv.ll Revert "Correct dwarf unwind information in function epilogue for X86" 2017-11-08 21:31:14 +00:00
cmp.ll
…
constant.ll [GlobalISel][X86] fix %ptr(p0) = G_CONSTANT selection. 2017-07-03 11:06:54 +00:00
ext-x86-64.ll [GISel]: Fix generation of illegal COPYs during CallLowering 2017-10-09 20:07:43 +00:00
ext.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
fadd-scalar.ll [GlobalISel][X86] Add fp32/62 legalizer, regbank-select, selection tests for G_FADD, G_FSUB, G_FMUL, G_FDIV. NFC. 2017-06-27 07:01:54 +00:00
fconstant.ll [GlobalISel][X86] G_FCONSTANT support. 2017-09-17 08:08:13 +00:00
fdiv-scalar.ll [GlobalISel][X86] Add fp32/62 legalizer, regbank-select, selection tests for G_FADD, G_FSUB, G_FMUL, G_FDIV. NFC. 2017-06-27 07:01:54 +00:00
fmul-scalar.ll [GlobalISel][X86] Add fp32/62 legalizer, regbank-select, selection tests for G_FADD, G_FSUB, G_FMUL, G_FDIV. NFC. 2017-06-27 07:01:54 +00:00
fpext-scalar.ll [GlobalISel][X86] support G_FPEXT operation. 2017-09-13 09:05:23 +00:00
frameIndex.ll Revert "Correct dwarf unwind information in function epilogue for X86" 2017-11-08 21:31:14 +00:00
fsub-scalar.ll [GlobalISel][X86] Add fp32/62 legalizer, regbank-select, selection tests for G_FADD, G_FSUB, G_FMUL, G_FDIV. NFC. 2017-06-27 07:01:54 +00:00
gep.ll Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)" 2017-10-04 17:54:06 +00:00
irtranslator-callingconv.ll MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-GV.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-add-v128.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-add-v256.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-add-v512.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-add.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-and-scalar.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-brcond.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-cmp.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-constant.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-ext-x86-64.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-ext.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-fadd-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-fdiv-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-fmul-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-fpext-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-fsub-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-gep.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-insert-vec256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-insert-vec512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-memop-scalar.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-mul-scalar.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-mul-v128.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-mul-v256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-mul-v512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
legalize-or-scalar.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-phi.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-sub-v128.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-sub-v256.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-sub-v512.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-sub.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-trunc.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-undef.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-xor-scalar.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
lit.local.cfg
…
memop-scalar-x32.ll [GlobalISel][X86] Support G_LOAD/G_STORE i1. 2017-07-10 09:26:09 +00:00
memop-scalar.ll Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)" 2017-10-04 17:54:06 +00:00
memop-vec.ll
…
mul-scalar.ll
…
mul-vec.ll
…
or-scalar.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
phi.ll [GlobalISel][X86] G_PHI support. 2017-09-04 09:06:45 +00:00
regbankselect-AVX2.mir [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
regbankselect-AVX512.mir [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
regbankselect-X32.mir [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
regbankselect-X86_64.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-GV.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-add-v128.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-add-v256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-add-v512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-add-x32.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-add.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-and-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-blsi.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-blsr.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-br.mir
…
select-brcond.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-cmp.mir [MIRPrinter] Use %subreg.xxx syntax for subregister index operands 2017-11-06 21:46:06 +00:00
select-constant.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-copy.mir [MIRPrinter] Use %subreg.xxx syntax for subregister index operands 2017-11-06 21:46:06 +00:00
select-ext-x86-64.mir [MIRPrinter] Use %subreg.xxx syntax for subregister index operands 2017-11-06 21:46:06 +00:00
select-ext.mir [MIRPrinter] Use %subreg.xxx syntax for subregister index operands 2017-11-06 21:46:06 +00:00
select-extract-vec256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-extract-vec512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-fadd-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-fconstant.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-fdiv-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-fmul-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-fpext-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-frameIndex.mir
…
select-fsub-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-gep.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-inc.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-insert-vec256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-insert-vec512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-intrinsic-x86-flags-read-u32.mir [MIRPrinter] Use %subreg.xxx syntax for subregister index operands 2017-11-06 21:46:06 +00:00
select-leaf-constant.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-memop-scalar-x32.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-memop-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-memop-v128.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-memop-v256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-memop-v512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-merge-vec256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-merge-vec512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-mul-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-mul-vec.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-or-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-phi.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-sub-v128.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-sub-v256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-sub-v512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-sub.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-trunc.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-undef.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-unmerge-vec256.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-unmerge-vec512.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
select-xor-scalar.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
sub-scalar.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
sub-vec.ll
…
trunc.ll
…
undef.ll [GlobalISel][X86] Support G_IMPLICIT_DEF. 2017-08-24 07:06:27 +00:00
x86_64-fallback.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
xor-scalar.ll [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00