llvm-project/llvm/test/CodeGen/BPF
Yonghong Song 02ac75092d [BPF] Handle offset reloc endpoint ending in the middle of chain properly
During studying support for bitfield, I found an issue for
an example like the one in test offset-reloc-middle-chain.ll.
  struct t1 { int c; };
  struct s1 { struct t1 b; };
  struct r1 { struct s1 a; };
  #define _(x) __builtin_preserve_access_index(x)
  void test1(void *p1, void *p2, void *p3);
  void test(struct r1 *arg) {
    struct s1 *ps = _(&arg->a);
    struct t1 *pt = _(&arg->a.b);
    int *pi = _(&arg->a.b.c);
    test1(ps, pt, pi);
  }

The IR looks like:
  %0 = llvm.preserve.struct.access(base, ...)
  %1 = llvm.preserve.struct.access(%0, ...)
  %2 = llvm.preserve.struct.access(%1, ...)
  using %0, %1 and %2

In this case, we need to generate three relocatiions
corresponding to chains: (%0), (%0, %1) and (%0, %1, %2).
After collecting all the chains, the current implementation
process each chain (in a map) with code generation sequentially.
For example, after (%0) is processed, the code may look like:
  %0 = base + special_global_variable
  // llvm.preserve.struct.access(base, ...) is delisted
  // from the instruction stream.
  %1 = llvm.preserve.struct.access(%0, ...)
  %2 = llvm.preserve.struct.access(%1, ...)
  using %0, %1 and %2

When processing chain (%0, %1), the current implementation
tries to visit intrinsic llvm.preserve.struct.access(base, ...)
to get some of its properties and this caused segfault.

This patch fixed the issue by remembering all necessary
information (kind, metadata, access_index, base) during
analysis phase, so in code generation phase there is
no need to examine the intrinsic call instructions.
This also simplifies the code.

Differential Revision: https://reviews.llvm.org/D68389

llvm-svn: 373621
2019-10-03 16:30:29 +00:00
..
BTF [BPF] Generate array dimension size properly for zero-size elements 2019-09-24 22:38:43 +00:00
CORE [BPF] Handle offset reloc endpoint ending in the middle of chain properly 2019-10-03 16:30:29 +00:00
32-bit-subreg-alu.ll
32-bit-subreg-cond-select.ll
32-bit-subreg-load-store.ll
32-bit-subreg-peephole.ll
alu8.ll
atomics.ll
basictest.ll
byval.ll
cc_args.ll
cc_args_be.ll
cc_ret.ll
cmp.ll
dwarfdump.ll
elf-symbol-information.ll
ex1.ll
fi_ri.ll
inline_asm.ll
inlineasm-output-template.ll [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
intrinsics.ll
lit.local.cfg
load.ll
loops.ll
many_args1.ll
many_args2.ll
mem_offset.ll
mem_offset_be.ll
memcpy-expand-in-order.ll
objdump_atomics.ll
objdump_cond_op.ll
objdump_cond_op_2.ll
objdump_imm_hex.ll
objdump_intrinsics.ll
objdump_static_var.ll [BPF] Don't fail for static variables 2019-02-27 05:36:15 +00:00
objdump_trivial.ll
objdump_two_funcs.ll [BPF] Fix bpf llvm-objdump issues. 2019-08-17 22:12:00 +00:00
reloc-btf-2.ll [BPF] Support for compile once and run everywhere 2019-07-09 15:28:41 +00:00
reloc-btf.ll [llvm-objdump] - Print relocation record in a GNU format. 2019-05-07 13:14:18 +00:00
reloc.ll [llvm-objdump] - Print relocation record in a GNU format. 2019-05-07 13:14:18 +00:00
remove_truncate_1.ll
remove_truncate_2.ll
remove_truncate_3.ll
remove_truncate_4.ll
remove_truncate_5.ll
rodata_1.ll
rodata_2.ll
rodata_3.ll
rodata_4.ll
sanity.ll
sdiv_error.ll
select_ri.ll
setcc.ll
shifts.ll
sockex2.ll
struct_ret1.ll
struct_ret2.ll
undef.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
vararg1.ll
warn-call.ll
warn-stack.ll
xadd.ll bpf: enable sub-register code-gen for XADD 2019-02-28 19:21:28 +00:00
xadd_legal.ll bpf: enable sub-register code-gen for XADD 2019-02-28 19:21:28 +00:00