forked from OSchip/llvm-project
107 lines
2.2 KiB
LLVM
107 lines
2.2 KiB
LLVM
; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=thumb-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=T2
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; rdar://8662825
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define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
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; ARM: t1:
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; ARM: sub r0, r1, #-2147483647
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; ARM: movgt r0, r1
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; T2: t1:
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; T2: mvn r0, #-2147483648
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; T2: add r0, r1
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; T2: movgt r0, r1
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%tmp1 = icmp sgt i32 %c, 10
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%tmp2 = select i1 %tmp1, i32 0, i32 2147483647
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%tmp3 = add i32 %tmp2, %b
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ret i32 %tmp3
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}
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define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
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; ARM: t2:
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; ARM: sub r0, r1, #10
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; ARM: movgt r0, r1
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; T2: t2:
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; T2: sub.w r0, r1, #10
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; T2: movgt r0, r1
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%tmp1 = icmp sgt i32 %c, 10
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%tmp2 = select i1 %tmp1, i32 0, i32 10
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%tmp3 = sub i32 %b, %tmp2
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ret i32 %tmp3
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}
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define i32 @t3(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
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; ARM: t3:
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; ARM: mvnlt r2, #0
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; ARM: and r0, r2, r3
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; T2: t3:
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; T2: movlt.w r2, #-1
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; T2: and.w r0, r2, r3
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%cond = icmp slt i32 %a, %b
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%z = select i1 %cond, i32 -1, i32 %x
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%s = and i32 %z, %y
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ret i32 %s
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}
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define i32 @t4(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
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; ARM: t4:
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; ARM: movlt r2, #0
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; ARM: orr r0, r2, r3
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; T2: t4:
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; T2: movlt r2, #0
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; T2: orr.w r0, r2, r3
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%cond = icmp slt i32 %a, %b
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%z = select i1 %cond, i32 0, i32 %x
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%s = or i32 %z, %y
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ret i32 %s
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}
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define i32 @t5(i32 %a, i32 %b, i32 %c) nounwind {
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entry:
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; ARM: t5:
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; ARM-NOT: moveq
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; ARM: orreq r2, r2, #1
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; T2: t5:
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; T2-NOT: moveq
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; T2: orreq r2, r2, #1
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%tmp1 = icmp eq i32 %a, %b
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%tmp2 = zext i1 %tmp1 to i32
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%tmp3 = or i32 %tmp2, %c
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ret i32 %tmp3
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}
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define i32 @t6(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
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; ARM: t6:
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; ARM-NOT: movge
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; ARM: eorlt r3, r3, r2
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; T2: t6:
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; T2-NOT: movge
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; T2: eorlt.w r3, r3, r2
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%cond = icmp slt i32 %a, %b
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%tmp1 = select i1 %cond, i32 %c, i32 0
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%tmp2 = xor i32 %tmp1, %d
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ret i32 %tmp2
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}
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define i32 @t7(i32 %a, i32 %b, i32 %c) nounwind {
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entry:
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; ARM: t7:
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; ARM-NOT: lsleq
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; ARM: andeq r2, r2, r2, lsl #1
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; T2: t7:
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; T2-NOT: lsleq.w
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; T2: andeq.w r2, r2, r2, lsl #1
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%tmp1 = shl i32 %c, 1
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%cond = icmp eq i32 %a, %b
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%tmp2 = select i1 %cond, i32 %tmp1, i32 -1
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%tmp3 = and i32 %c, %tmp2
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ret i32 %tmp3
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}
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