llvm-project/llvm/test/CodeGen
Francesco Petrogalli 4dde9e9b02 [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection instructions.
Summary:
The IR intrinsics are mapped to the following SVE2 instructions:

* WHILERW <Pd>.<T>, <Xn>, <Xm>
* WHILEWR <Pd>.<T>, <Xn>, <Xm>

The intrinsics introduced in this patch are the IR counterpart of the
SVE ACLE functions `svwhilerw` and `svwhilewr` (all data type
variants).

Patch by Maciej Gąbka <maciej.gabka@arm.com>.

Reviewers: kmclaughlin, rengolin

Reviewed By: kmclaughlin

Subscribers: tschuett, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75862
2020-03-11 18:28:02 +00:00
..
AArch64 [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection instructions. 2020-03-11 18:28:02 +00:00
AMDGPU [AMDGPU] Disable nested endcf collapse 2020-03-11 11:24:20 -07:00
ARC
ARM [ARM] Improve codegen of volatile load/store of i64 2020-03-11 10:19:27 +00:00
AVR [AVR] Fix incorrect register state for LDRdPtr 2020-03-03 17:34:54 +08:00
BPF [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
Generic Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
Hexagon [Hexagon] Fix match pattern in a testcase 2020-03-09 09:09:58 -05:00
Inputs
Lanai Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
MIR Reland "[DebugInfo] Enable the debug entry values feature by default" 2020-03-10 09:15:06 +01:00
MSP430
Mips [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
NVPTX ARM: Fixup some tests using denormal-fp-math attribute 2020-03-10 14:02:06 -04:00
PowerPC [NFC][Test] Add a PowerPC test to verify the behavior of a*b +/- c*d 2020-03-11 09:35:40 +00:00
RISCV [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
SPARC [Sparc] Fix incorrect operand for matching CMPri pattern 2020-03-02 11:36:32 +08:00
SystemZ [SystemZ] Improve foldMemoryOperandImpl(). 2020-03-10 15:54:47 +01:00
Thumb [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
Thumb2 [ARM] Extra VFMA tests. NFC 2020-03-11 15:14:07 +00:00
VE [VE] Target-specific bit size for sjljehprepare 2020-03-10 17:51:16 +01:00
WebAssembly [WebAssembly] Simplify extract_vector lowering 2020-02-25 13:54:48 -08:00
WinCFGuard
WinEH
X86 [GC] Remove buggy untested optimization from statepoint lowering 2020-03-11 10:03:24 -07:00
XCore [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00