forked from OSchip/llvm-project
262 lines
6.5 KiB
TableGen
262 lines
6.5 KiB
TableGen
//===- AlphaInstrFormats.td - Alpha Instruction Formats ----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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//3.3:
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//Memory
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//Branch
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//Operate
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//Floating-point
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//PALcode
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def u8imm : Operand<i64>;
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def s14imm : Operand<i64>;
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def s16imm : Operand<i64>;
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def s21imm : Operand<i64>;
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def s64imm : Operand<i64>;
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def u64imm : Operand<i64>;
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//===----------------------------------------------------------------------===//
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// Instruction format superclass
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//===----------------------------------------------------------------------===//
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// Alpha instruction baseline
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class InstAlpha<bits<6> op, string asmstr, InstrItinClass itin> : Instruction {
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field bits<32> Inst;
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let Namespace = "Alpha";
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let AsmString = asmstr;
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let Inst{31-26} = op;
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let Itinerary = itin;
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}
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//3.3.1
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class MForm<bits<6> opcode, bit store, bit load, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let isStore = store;
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let isLoad = load;
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let Defs = [R28]; //We may use this for frame index calculations, so reserve it here
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bits<5> Ra;
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bits<16> disp;
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bits<5> Rb;
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let Inst{25-21} = Ra;
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let Inst{20-16} = Rb;
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let Inst{15-0} = disp;
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}
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class MfcForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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bits<5> Ra;
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let OutOperandList = (ops GPRC:$RA);
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let InOperandList = (ops);
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let Inst{25-21} = Ra;
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let Inst{20-16} = 0;
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let Inst{15-0} = fc;
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}
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class MbrForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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bits<5> Ra;
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bits<5> Rb;
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bits<14> disp;
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let OutOperandList = (ops);
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let InOperandList = OL;
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let Inst{25-21} = Ra;
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let Inst{20-16} = Rb;
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let Inst{15-14} = TB;
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let Inst{13-0} = disp;
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}
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class MbrpForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern=pattern;
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bits<5> Ra;
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bits<5> Rb;
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bits<14> disp;
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let OutOperandList = (ops);
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let InOperandList = OL;
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let Inst{25-21} = Ra;
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let Inst{20-16} = Rb;
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let Inst{15-14} = TB;
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let Inst{13-0} = disp;
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}
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//3.3.2
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def target : Operand<OtherVT> {}
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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class BFormN<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let OutOperandList = (ops);
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let InOperandList = OL;
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bits<64> Opc; //dummy
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bits<5> Ra;
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bits<21> disp;
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let Inst{25-21} = Ra;
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let Inst{20-0} = disp;
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}
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}
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let isBranch = 1, isTerminator = 1 in
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class BFormD<bits<6> opcode, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (ops);
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let InOperandList = (ops target:$DISP);
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bits<5> Ra;
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bits<21> disp;
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let Inst{25-21} = Ra;
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let Inst{20-0} = disp;
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}
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//3.3.3
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class OForm<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (outs GPRC:$RC);
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let InOperandList = (ins GPRC:$RA, GPRC:$RB);
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bits<5> Rc;
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bits<5> Ra;
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bits<5> Rb;
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bits<7> Function = fun;
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let Inst{25-21} = Ra;
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let Inst{20-16} = Rb;
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let Inst{15-13} = 0;
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let Inst{12} = 0;
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let Inst{11-5} = Function;
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let Inst{4-0} = Rc;
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}
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class OForm2<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (outs GPRC:$RC);
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let InOperandList = (ins GPRC:$RB);
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bits<5> Rc;
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bits<5> Rb;
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bits<7> Function = fun;
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let Inst{25-21} = 31;
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let Inst{20-16} = Rb;
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let Inst{15-13} = 0;
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let Inst{12} = 0;
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let Inst{11-5} = Function;
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let Inst{4-0} = Rc;
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}
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class OForm4<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (outs GPRC:$RDEST);
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let InOperandList = (ins GPRC:$RCOND, GPRC:$RTRUE, GPRC:$RFALSE);
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let Constraints = "$RFALSE = $RDEST";
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let DisableEncoding = "$RFALSE";
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bits<5> Rc;
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bits<5> Ra;
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bits<5> Rb;
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bits<7> Function = fun;
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// let isTwoAddress = 1;
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let Inst{25-21} = Ra;
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let Inst{20-16} = Rb;
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let Inst{15-13} = 0;
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let Inst{12} = 0;
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let Inst{11-5} = Function;
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let Inst{4-0} = Rc;
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}
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class OFormL<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (outs GPRC:$RC);
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let InOperandList = (ins GPRC:$RA, u8imm:$L);
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bits<5> Rc;
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bits<5> Ra;
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bits<8> LIT;
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bits<7> Function = fun;
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let Inst{25-21} = Ra;
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let Inst{20-13} = LIT;
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let Inst{12} = 1;
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let Inst{11-5} = Function;
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let Inst{4-0} = Rc;
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}
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class OForm4L<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (outs GPRC:$RDEST);
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let InOperandList = (ins GPRC:$RCOND, s64imm:$RTRUE, GPRC:$RFALSE);
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let Constraints = "$RFALSE = $RDEST";
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let DisableEncoding = "$RFALSE";
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bits<5> Rc;
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bits<5> Ra;
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bits<8> LIT;
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bits<7> Function = fun;
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// let isTwoAddress = 1;
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let Inst{25-21} = Ra;
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let Inst{20-13} = LIT;
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let Inst{12} = 1;
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let Inst{11-5} = Function;
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let Inst{4-0} = Rc;
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}
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//3.3.4
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class FPForm<bits<6> opcode, bits<11> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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bits<5> Fc;
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bits<5> Fa;
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bits<5> Fb;
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bits<11> Function = fun;
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let Inst{25-21} = Fa;
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let Inst{20-16} = Fb;
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let Inst{15-5} = Function;
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let Inst{4-0} = Fc;
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}
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//3.3.5
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class PALForm<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let OutOperandList = (ops);
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let InOperandList = OL;
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bits<26> Function;
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let Inst{25-0} = Function;
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}
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// Pseudo instructions.
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class PseudoInstAlpha<dag OOL, dag IOL, string nm, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<0, nm, itin> {
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let OutOperandList = OOL;
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let InOperandList = IOL;
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let Pattern = pattern;
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}
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