Matt Arsenault aa41e92e17 AMDGPU: Avoid most waitcnts before calls ... Currently you get extra waits, because waits are inserted for the register dependencies of the call, and the function prolog waits on everything. Currently waits are still inserted on returns. It may make sense to not do this, and wait in the caller instead. llvm-svn: 363465		2019-06-14 21:52:26 +00:00
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AArch64	[GlobalISel] Add a G_BRJT opcode.	2019-06-14 17:55:48 +00:00
AMDGPU	AMDGPU: Avoid most waitcnts before calls	2019-06-14 21:52:26 +00:00
ARC	…
ARM	[ARM] MVE VPT Block Pass	2019-06-14 11:46:05 +00:00
AVR	[AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests	2019-06-12 08:31:07 +00:00
BPF	[BPF] generate R_BPF_NONE relocation for BTF DataSec variables	2019-05-26 21:26:06 +00:00
Generic	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
Hexagon	Revert "[SCEV] Use wrap flags in InsertBinop"	2019-06-06 12:35:46 +00:00
Inputs	…
Lanai	[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)	2019-06-04 11:06:21 +00:00
MIR	AMDGPU: Invert frame index offset interpretation	2019-06-05 22:20:47 +00:00
MSP430	[AsmPrinter] refactor to support %c w/ GlobalAddress'	2019-04-26 18:45:04 +00:00
Mips	[FastISel] Skip creating unnecessary vregs for arguments	2019-06-10 16:53:37 +00:00
NVPTX	SelectionDAG: accommodate atomic floating stores.	2019-05-10 11:23:04 +00:00
PowerPC	[MachinePiepliner] Don't check boundary node in checkValidNodeOrder	2019-06-13 21:51:12 +00:00
RISCV	[RISCV] Fix inline-asm.ll test by adding nounwind attribute	2019-06-12 05:32:30 +00:00
SPARC	[DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold. Try 3	2019-05-30 20:37:18 +00:00
SystemZ	[FastISel] Skip creating unnecessary vregs for arguments	2019-06-10 16:53:37 +00:00
Thumb	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
Thumb2	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
WebAssembly	[WebAssembly] Limit PIC support to the Emscripten target	2019-06-05 20:01:01 +00:00
WinCFGuard	…
WinEH	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
X86	[x86] add test for 256-bit blendv with AVX targets; NFC	2019-06-14 20:03:42 +00:00
XCore	Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."	2019-06-13 19:24:51 +00:00