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llvm-project/llvm/test/CodeGen/Mips/GlobalISel
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Matt Arsenault 0b7f6cc71a GlobalISel: Add generic instructions for memory intrinsics 
AArch64, X86 and Mips currently directly consumes these and custom
lowering to produce a libcall, but really these should follow the
normal legalization process through the libcall/lower action.
 		2020-08-26 20:08:45 -04:00
..
instruction-select [MIPS GlobalISel] Select 4 byte unaligned load and store 2020-02-19 11:57:06 +01:00
irtranslator GlobalISel: Add generic instructions for memory intrinsics 2020-08-26 20:08:45 -04:00
legalizer GlobalISel: Add generic instructions for memory intrinsics 2020-08-26 20:08:45 -04:00
llvm-ir RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
mips-prelegalizer-combiner [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
regbankselect [MIPS GlobalISel] Select 4 byte unaligned load and store 2020-02-19 11:57:06 +01:00