forked from OSchip/llvm-project
90 lines
3.5 KiB
ArmAsm
90 lines
3.5 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %S/Inputs/arm-thumb-blx-targets.s -o %ttarget
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// RUN: echo "SECTIONS { \
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// RUN: .R_ARM_CALL24_callee1 : { *(.R_ARM_CALL24_callee_low) } \
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// RUN: .R_ARM_CALL24_callee2 : { *(.R_ARM_CALL24_callee_thumb_low) } \
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// RUN: .caller : { *(.text) } \
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// RUN: .R_ARM_CALL24_callee3 : { *(.R_ARM_CALL24_callee_high) } \
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// RUN: .R_ARM_CALL24_callee4 : { *(.R_ARM_CALL24_callee_thumb_high) } } " > %t.script
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// RUN: ld.lld --script %t.script %t %ttarget -o %t2
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// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck %s
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// Test BLX instruction is chosen for Thumb BL/BLX instruction and ARM callee
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// 2 byte nops are used to test the pc-rounding behaviour. As a BLX from a
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// 2 byte aligned destination is defined as Align(PC,4) + immediate:00
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// FIXME: llvm-mc has problems assembling BLX unless the destination is
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// external. The targets of the BL and BLX instructions are in arm-thumb-blx-target.s
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.syntax unified
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.section .text, "ax",%progbits
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.thumb
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.globl _start
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.balign 0x10000
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.type _start,%function
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_start:
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blx callee_low
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nop
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bl callee_low
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nop
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blx callee_high
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nop
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bl callee_high
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nop
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blx blx_far
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nop
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bl blx_far
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nop
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// Expect BLX to thumb target to be written out as a BL
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blx callee_thumb_low
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nop
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blx callee_thumb_high
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bx lr
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// CHECK: Disassembly of section .R_ARM_CALL24_callee1:
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// CHECK-EMPTY:
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// CHECK-NEXT-ARM: callee_low:
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// CHECK-NEXT-ARM: b4: 1e ff 2f e1 bx lr
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// CHECK: Disassembly of section .R_ARM_CALL24_callee2:
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// CHECK-EMPTY:
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// CHECK-NEXT-THUMB: callee_thumb_low:
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// CHECK-NEXT-THUMB: 100: 70 47 bx lr
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// CHECK: Disassembly of section .caller:
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// CHECK-EMPTY:
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// CHECK: <_start>:
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// Align(0x10000,4) - 0xff50 (65360) + 4 = 0xb4 = callee_low
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// CHECK-NEXT-THUMB: 10000: f0 f7 58 e8 blx #-65360
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// CHECK-NEXT-THUMB: 10004: 00 bf nop
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// Align(0x10006,4) - 0xff54 (65364) + 4 = 0xb4 = callee_low
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// CHECK-NEXT-THUMB: 10006: f0 f7 56 e8 blx #-65364
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// CHECK-NEXT-THUMB: 1000a: 00 bf nop
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// Align(0x1000c,4) + 0xf0 (240) + 4 = 0x10100 = callee_high
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// CHECK-NEXT-THUMB: 1000c: 00 f0 78 e8 blx #240
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// CHECK-NEXT-THUMB: 10010: 00 bf nop
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// Align(0x10012,4) + 0xec (236) + 4 = 0x10100 = callee_high
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// CHECK-NEXT-THUMB: 10012: 00 f0 76 e8 blx #236
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// CHECK-NEXT-THUMB: 10016: 00 bf nop
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// Align(0x10018,4) + 0xfffffc (16777212) = 0x1010018 = blx_far
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// CHECK-NEXT-THUMB: 10018: ff f3 fe c7 blx #16777212
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// CHECK-NEXT-THUMB: 1001c: 00 bf nop
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// Align(0x1001e,4) + 0xfffff8 (16777208) = 0x1010018 = blx_far
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// CHECK-NEXT-THUMB: 1001e: ff f3 fc c7 blx #16777208
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// CHECK-NEXT-THUMB: 10022: 00 bf nop
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// 10024 - 0xff28 (65320) + 4 = 0x100 = callee_thumb_low
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// CHECK-NEXT-THUMB: 10024: f0 f7 6c f8 bl #-65320
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// CHECK-NEXT-THUMB: 10028: 00 bf nop
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// 1002a + 0x1d2 (466) + 4 = 0x10200 = callee_thumb_high
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// CHECK-NEXT-THUMB: 1002a: 00 f0 e9 f8 bl #466
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// CHECK-NEXT-THUMB: 1002e: 70 47 bx lr
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// CHECK: Disassembly of section .R_ARM_CALL24_callee3:
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// CHECK-EMPTY:
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// CHECK-NEXT-ARM: callee_high:
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// CHECK-NEXT-ARM: 10100: 1e ff 2f e1 bx lr
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// CHECK: Disassembly of section .R_ARM_CALL24_callee4:
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// CHECK-EMPTY:
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// CHECK-NEXT-THUMB:callee_thumb_high:
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// CHECK-NEXT-THUMB: 10200: 70 47 bx lr
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