forked from OSchip/llvm-project
68 lines
2.1 KiB
ArmAsm
68 lines
2.1 KiB
ArmAsm
# REQUIRES: aarch64
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# RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
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# RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %p/Inputs/aarch64-addrifunc.s -o %t1.o
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# RUN: ld.lld --shared --soname=t1.so %t1.o -o %t1.so
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# RUN: ld.lld --pie %t1.so %t.o -o %t
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# RUN: llvm-objdump -d --no-show-raw-insn --mattr=+bti --triple=aarch64-linux-gnu %t | FileCheck %s
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# When the address of an ifunc is taken using a non-got reference which clang
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# can do, LLD exports a canonical PLT entry that may have its address taken so
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# we must use bti c.
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# CHECK: Disassembly of section .plt:
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# CHECK: 0000000000010380 <.plt>:
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# CHECK-NEXT: 10380: bti c
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# CHECK-NEXT: stp x16, x30, [sp, #-16]!
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# CHECK-NEXT: adrp x16, 0x30000
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# CHECK-NEXT: ldr x17, [x16, #1288]
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# CHECK-NEXT: add x16, x16, #1288
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# CHECK-NEXT: br x17
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# CHECK-NEXT: nop
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# CHECK-NEXT: nop
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# CHECK: 00000000000103a0 <func1@plt>:
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# CHECK-NEXT: 103a0: bti c
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# CHECK-NEXT: adrp x16, 0x30000
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# CHECK-NEXT: ldr x17, [x16, #1296]
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# CHECK-NEXT: add x16, x16, #1296
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# CHECK-NEXT: br x17
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# CHECK-NEXT: nop
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# CHECK-EMPTY:
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# CHECK: Disassembly of section .iplt:
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# CHECK-EMPTY:
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# CHECK-NEXT: 00000000000103c0 <myfunc>:
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# CHECK-NEXT: 103c0: bti c
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# CHECK-NEXT: adrp x16, 0x30000
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# CHECK-NEXT: ldr x17, [x16, #1304]
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# CHECK-NEXT: add x16, x16, #1304
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# CHECK-NEXT: br x17
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# CHECK-NEXT: nop
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.section ".note.gnu.property", "a"
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.long 4
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.long 0x10
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.long 0x5
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.asciz "GNU"
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.long 0xc0000000 // GNU_PROPERTY_AARCH64_FEATURE_1_AND
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.long 4
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.long 1 // GNU_PROPERTY_AARCH64_FEATURE_1_BTI
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.long 0
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.text
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.globl myfunc
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.type myfunc,@gnu_indirect_function
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myfunc:
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ret
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.globl func1
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.text
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.globl _start
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.type _start, %function
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_start:
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bl func1
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adrp x8, myfunc
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add x8, x8, :lo12:myfunc
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ret
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