forked from OSchip/llvm-project
57 lines
2.1 KiB
LLVM
57 lines
2.1 KiB
LLVM
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
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; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s --check-prefix=IR
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;
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; Check that we guard the divisions because we moved them and thereby increased
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; their domain.
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;
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; CHECK: Invalid Context:
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; CHECK-NEXT: [p_0] -> { : p_0 < 0 }
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; CHECK-NEXT: p0: ((%a /u %b) /u (%c /u %d))
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;
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; void f(unsigned *A, unsigned a, unsigned b, unsigned c, unsigned d) {
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; for (unsigned i; i < 100; i++)
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; A[i] += A[(a / b) / (c / d)];
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; }
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;
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; IR: %[[R0:[.a-zA-Z0-9]*]] = icmp ugt i32 %b, 1
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; IR-NEXT: %[[R1:[.a-zA-Z0-9]*]] = select i1 %[[R0]], i32 %b, i32 1
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; IR-NEXT: %[[R2:[.a-zA-Z0-9]*]] = udiv i32 %a, %[[R1]]
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; IR-NEXT: %[[R5:[.a-zA-Z0-9]*]] = icmp ugt i32 %d, 1
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; IR-NEXT: %[[R6:[.a-zA-Z0-9]*]] = select i1 %[[R5]], i32 %d, i32 1
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; IR-NEXT: %[[R7:[.a-zA-Z0-9]*]] = udiv i32 %c, %[[R6]]
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; IR-NEXT: %[[R3:[.a-zA-Z0-9]*]] = icmp ugt i32 %[[R7]], 1
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; IR-NEXT: %[[R4:[.a-zA-Z0-9]*]] = select i1 %[[R3]], i32 %[[R7]], i32 1
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; IR-NEXT: %[[R8:[.a-zA-Z0-9]*]] = udiv i32 %[[R2]], %[[R4]]
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32* %A, i32 %a, i32 %b, i32 %c, i32 %d) {
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entry:
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br label %for.cond
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for.cond: ; preds = %for.inc, %entry
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]
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%cmp = icmp ult i64 %indvars.iv, 100
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%div = udiv i32 %a, %b
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%div1 = udiv i32 %c, %d
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%div2 = udiv i32 %div, %div1
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%idxprom = zext i32 %div2 to i64
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %idxprom
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%tmp = load i32, i32* %arrayidx, align 4
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%arrayidx4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp1 = load i32, i32* %arrayidx4, align 4
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%add = add i32 %tmp1, %tmp
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store i32 %add, i32* %arrayidx4, align 4
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br label %for.inc
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for.inc: ; preds = %for.body
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret void
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}
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