Jiangning Liu 2878dc8fe7 Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions, ... SADDL, UADDL, SADDW, UADDW, SSUBL, USUBL, SSUBW, USUBW, ADDHN, RADDHN, SABAL, UABAL, SUBHN, RSUBHN, SABDL, UABDL, SMLAL, UMLAL, SMLSL, UMLSL, SQDMLAL, SQDMLSL, SMULL, UMULL, SQDMULL, PMULL llvm-svn: 190288		2013-09-09 02:20:27 +00:00
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AArch64	Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,	2013-09-09 02:20:27 +00:00
ARM	[ARMv8] Add some missing tests for DSB/DMB.	2013-09-05 16:05:45 +00:00
Mips	This patch adds support for microMIPS Multiply and Add/Sub instructions. Test cases are included in patch.	2013-09-06 13:08:00 +00:00
SystemZ	[SystemZ] Add NC, OC and XC	2013-09-05 10:36:45 +00:00
X86	Fixed a bug where diassembling an instruction that had a prefix would cause LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode.	2013-08-30 21:19:48 +00:00
XCore	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00