forked from OSchip/llvm-project
747 lines
25 KiB
LLVM
747 lines
25 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -instcombine -S < %s | FileCheck %s
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%overflow.result = type {i8, i1}
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%ov.result.32 = type { i32, i1 }
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declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
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declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone
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declare %ov.result.32 @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
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declare %ov.result.32 @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
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declare %ov.result.32 @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
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declare %ov.result.32 @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
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declare %ov.result.32 @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
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declare %ov.result.32 @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
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declare double @llvm.powi.f64(double, i32) nounwind readonly
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declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
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declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
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declare i1 @llvm.cttz.i1(i1, i1) nounwind readnone
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declare i1 @llvm.ctlz.i1(i1, i1) nounwind readnone
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declare i32 @llvm.ctpop.i32(i32) nounwind readnone
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declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) nounwind readnone
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declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
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declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone
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declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
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declare <2 x i8> @llvm.ctlz.v2i8(<2 x i8>, i1) nounwind readnone
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declare double @llvm.cos.f64(double %Val) nounwind readonly
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declare double @llvm.sin.f64(double %Val) nounwind readonly
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declare double @llvm.floor.f64(double %Val) nounwind readonly
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declare double @llvm.ceil.f64(double %Val) nounwind readonly
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declare double @llvm.trunc.f64(double %Val) nounwind readonly
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declare double @llvm.rint.f64(double %Val) nounwind readonly
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declare double @llvm.nearbyint.f64(double %Val) nounwind readonly
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define i8 @uaddtest1(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
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%y = extractvalue %overflow.result %x, 0
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ret i8 %y
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; CHECK-LABEL: @uaddtest1(
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; CHECK-NEXT: %y = add i8 %A, %B
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; CHECK-NEXT: ret i8 %y
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}
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define i8 @uaddtest2(i8 %A, i8 %B, i1* %overflowPtr) {
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%and.A = and i8 %A, 127
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%and.B = and i8 %B, 127
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK-LABEL: @uaddtest2(
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; CHECK-NEXT: %and.A = and i8 %A, 127
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; CHECK-NEXT: %and.B = and i8 %B, 127
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; CHECK-NEXT: %x = add nuw i8 %and.A, %and.B
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %x
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}
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define i8 @uaddtest3(i8 %A, i8 %B, i1* %overflowPtr) {
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%or.A = or i8 %A, -128
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%or.B = or i8 %B, -128
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK-LABEL: @uaddtest3(
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; CHECK-NEXT: %or.A = or i8 %A, -128
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; CHECK-NEXT: %or.B = or i8 %B, -128
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; CHECK-NEXT: %x = add i8 %or.A, %or.B
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; CHECK-NEXT: store i1 true, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %x
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}
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define i8 @uaddtest4(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK-LABEL: @uaddtest4(
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; CHECK-NEXT: ret i8 undef
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}
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define i8 @uaddtest5(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 0, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK-LABEL: @uaddtest5(
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; CHECK: ret i8 %A
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}
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define i1 @uaddtest6(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 -4)
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%z = extractvalue %overflow.result %x, 1
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ret i1 %z
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; CHECK-LABEL: @uaddtest6(
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; CHECK-NEXT: %z = icmp ugt i8 %A, 3
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; CHECK-NEXT: ret i1 %z
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}
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define i8 @uaddtest7(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
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%z = extractvalue %overflow.result %x, 0
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ret i8 %z
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; CHECK-LABEL: @uaddtest7(
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; CHECK-NEXT: %z = add i8 %A, %B
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; CHECK-NEXT: ret i8 %z
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}
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; PR20194
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define %ov.result.32 @saddtest_nsw(i8 %a, i8 %b) {
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%A = sext i8 %a to i32
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%B = sext i8 %b to i32
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%x = call %ov.result.32 @llvm.sadd.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @saddtest_nsw
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; CHECK: %x = add nsw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define %ov.result.32 @uaddtest_nuw(i32 %a, i32 %b) {
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%A = and i32 %a, 2147483647
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%B = and i32 %b, 2147483647
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%x = call %ov.result.32 @llvm.uadd.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @uaddtest_nuw
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; CHECK: %x = add nuw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define %ov.result.32 @ssubtest_nsw(i8 %a, i8 %b) {
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%A = sext i8 %a to i32
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%B = sext i8 %b to i32
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%x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @ssubtest_nsw
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; CHECK: %x = sub nsw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define %ov.result.32 @usubtest_nuw(i32 %a, i32 %b) {
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%A = or i32 %a, 2147483648
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%B = and i32 %b, 2147483647
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%x = call %ov.result.32 @llvm.usub.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @usubtest_nuw
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; CHECK: %x = sub nuw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define %ov.result.32 @smultest1_nsw(i32 %a, i32 %b) {
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%A = and i32 %a, 4095 ; 0xfff
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%B = and i32 %b, 524287; 0x7ffff
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%x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @smultest1_nsw
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; CHECK: %x = mul nuw nsw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define %ov.result.32 @smultest2_nsw(i32 %a, i32 %b) {
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%A = ashr i32 %a, 16
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%B = ashr i32 %b, 16
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%x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @smultest2_nsw
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; CHECK: %x = mul nsw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define %ov.result.32 @smultest3_sw(i32 %a, i32 %b) {
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%A = ashr i32 %a, 16
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%B = ashr i32 %b, 15
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%x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @smultest3_sw
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; CHECK: %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
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; CHECK-NEXT: ret %ov.result.32 %x
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}
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define %ov.result.32 @umultest_nuw(i32 %a, i32 %b) {
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%A = and i32 %a, 65535 ; 0xffff
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%B = and i32 %b, 65535 ; 0xffff
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%x = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %A, i32 %B)
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ret %ov.result.32 %x
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; CHECK-LABEL: @umultest_nuw
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; CHECK: %x = mul nuw i32 %A, %B
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; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
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; CHECK-NEXT: ret %ov.result.32 %1
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}
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define i8 @umultest1(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK-LABEL: @umultest1(
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 0
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}
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define i8 @umultest2(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK-LABEL: @umultest2(
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %A
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}
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define i32 @umultest3(i32 %n) nounwind {
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%shr = lshr i32 %n, 2
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%mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %shr, i32 3)
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%ov = extractvalue %ov.result.32 %mul, 1
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%res = extractvalue %ov.result.32 %mul, 0
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%ret = select i1 %ov, i32 -1, i32 %res
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ret i32 %ret
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; CHECK-LABEL: @umultest3(
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; CHECK-NEXT: shr
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; CHECK-NEXT: mul nuw
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; CHECK-NEXT: ret
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}
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define i32 @umultest4(i32 %n) nounwind {
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%shr = lshr i32 %n, 1
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%mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %shr, i32 4)
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%ov = extractvalue %ov.result.32 %mul, 1
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%res = extractvalue %ov.result.32 %mul, 0
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%ret = select i1 %ov, i32 -1, i32 %res
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ret i32 %ret
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; CHECK-LABEL: @umultest4(
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; CHECK: umul.with.overflow
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}
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define %ov.result.32 @umultest5(i32 %x, i32 %y) nounwind {
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%or_x = or i32 %x, 2147483648
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%or_y = or i32 %y, 2147483648
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%mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %or_x, i32 %or_y)
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ret %ov.result.32 %mul
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; CHECK-LABEL: @umultest5(
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; CHECK-NEXT: %[[or_x:.*]] = or i32 %x, -2147483648
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; CHECK-NEXT: %[[or_y:.*]] = or i32 %y, -2147483648
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; CHECK-NEXT: %[[mul:.*]] = mul i32 %[[or_x]], %[[or_y]]
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; CHECK-NEXT: %[[ret:.*]] = insertvalue %ov.result.32 { i32 undef, i1 true }, i32 %[[mul]], 0
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; CHECK-NEXT: ret %ov.result.32 %[[ret]]
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}
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define void @powi(double %V, double *%P) {
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%A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind
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store volatile double %A, double* %P
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%D = tail call double @llvm.powi.f64(double %V, i32 2) nounwind
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store volatile double %D, double* %P
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ret void
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; CHECK-LABEL: @powi(
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; CHECK: %A = fdiv double 1.0{{.*}}, %V
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; CHECK: store volatile double %A,
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; CHECK: %D = fmul double %V, %V
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; CHECK: store volatile double %D
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}
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define i32 @cttz(i32 %a) {
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; CHECK-LABEL: @cttz(
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; CHECK-NEXT: ret i32 3
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;
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%or = or i32 %a, 8
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%and = and i32 %or, -8
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%count = tail call i32 @llvm.cttz.i32(i32 %and, i1 true) nounwind readnone
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ret i32 %count
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}
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define <2 x i32> @cttz_vec(<2 x i32> %a) {
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; CHECK-LABEL: @cttz_vec(
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; CHECK-NEXT: ret <2 x i32> <i32 3, i32 3>
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;
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%or = or <2 x i32> %a, <i32 8, i32 8>
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%and = and <2 x i32> %or, <i32 -8, i32 -8>
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%count = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %and, i1 true) nounwind readnone
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ret <2 x i32> %count
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}
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; Make sure we don't add range metadata to i1 cttz.
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define i1 @cttz_i1(i1 %arg) {
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; CHECK-LABEL: @cttz_i1(
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; CHECK-NEXT: [[CNT:%.*]] = call i1 @llvm.cttz.i1(i1 [[ARG:%.*]], i1 false) #2
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; CHECK-NEXT: ret i1 [[CNT]]
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;
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%cnt = call i1 @llvm.cttz.i1(i1 %arg, i1 false) nounwind readnone
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ret i1 %cnt
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}
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define i1 @cttz_knownbits(i32 %arg) {
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; CHECK-LABEL: @cttz_knownbits(
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; CHECK-NEXT: ret i1 false
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;
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%or = or i32 %arg, 4
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%cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone
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%res = icmp eq i32 %cnt, 4
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ret i1 %res
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}
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define <2 x i1> @cttz_knownbits_vec(<2 x i32> %arg) {
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; CHECK-LABEL: @cttz_knownbits_vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%or = or <2 x i32> %arg, <i32 4, i32 4>
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%cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i32> %cnt, <i32 4, i32 4>
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ret <2 x i1> %res
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}
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define i1 @cttz_knownbits2(i32 %arg) {
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; CHECK-LABEL: @cttz_knownbits2(
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[ARG:%.*]], 4
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; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #2, !range ![[$CTTZ_RANGE:[0-9]+]]
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[CNT]], 2
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%or = or i32 %arg, 4
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%cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone
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%res = icmp eq i32 %cnt, 2
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ret i1 %res
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}
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define <2 x i1> @cttz_knownbits2_vec(<2 x i32> %arg) {
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; CHECK-LABEL: @cttz_knownbits2_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
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; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[CNT]], <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i1> [[RES]]
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;
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%or = or <2 x i32> %arg, <i32 4, i32 4>
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%cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i32> %cnt, <i32 2, i32 2>
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ret <2 x i1> %res
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}
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define i1 @cttz_knownbits3(i32 %arg) {
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; CHECK-LABEL: @cttz_knownbits3(
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; CHECK-NEXT: ret i1 false
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;
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%or = or i32 %arg, 4
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%cnt = call i32 @llvm.cttz.i32(i32 %or, i1 true) nounwind readnone
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%res = icmp eq i32 %cnt, 3
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ret i1 %res
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}
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; TODO: The icmp is unnecessary given the known bits of the input.
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define <2 x i1> @cttz_knownbits3_vec(<2 x i32> %arg) {
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; CHECK-LABEL: @cttz_knownbits3_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[CNT]], <i32 3, i32 3>
|
|
; CHECK-NEXT: ret <2 x i1> [[RES]]
|
|
;
|
|
%or = or <2 x i32> %arg, <i32 4, i32 4>
|
|
%cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone
|
|
%res = icmp eq <2 x i32> %cnt, <i32 3, i32 3>
|
|
ret <2 x i1> %res
|
|
}
|
|
|
|
define i8 @ctlz(i8 %a) {
|
|
; CHECK-LABEL: @ctlz(
|
|
; CHECK-NEXT: ret i8 2
|
|
;
|
|
%or = or i8 %a, 32
|
|
%and = and i8 %or, 63
|
|
%count = tail call i8 @llvm.ctlz.i8(i8 %and, i1 true) nounwind readnone
|
|
ret i8 %count
|
|
}
|
|
|
|
define <2 x i8> @ctlz_vec(<2 x i8> %a) {
|
|
; CHECK-LABEL: @ctlz_vec(
|
|
; CHECK-NEXT: ret <2 x i8> <i8 2, i8 2>
|
|
;
|
|
%or = or <2 x i8> %a, <i8 32, i8 32>
|
|
%and = and <2 x i8> %or, <i8 63, i8 63>
|
|
%count = tail call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %and, i1 true) nounwind readnone
|
|
ret <2 x i8> %count
|
|
}
|
|
|
|
; Make sure we don't add range metadata to i1 ctlz.
|
|
define i1 @ctlz_i1(i1 %arg) {
|
|
; CHECK-LABEL: @ctlz_i1(
|
|
; CHECK-NEXT: [[CNT:%.*]] = call i1 @llvm.ctlz.i1(i1 [[ARG:%.*]], i1 false) #2
|
|
; CHECK-NEXT: ret i1 [[CNT]]
|
|
;
|
|
%cnt = call i1 @llvm.ctlz.i1(i1 %arg, i1 false) nounwind readnone
|
|
ret i1 %cnt
|
|
}
|
|
|
|
define i1 @ctlz_knownbits(i8 %arg) {
|
|
; CHECK-LABEL: @ctlz_knownbits(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%or = or i8 %arg, 32
|
|
%cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone
|
|
%res = icmp eq i8 %cnt, 4
|
|
ret i1 %res
|
|
}
|
|
|
|
define <2 x i1> @ctlz_knownbits_vec(<2 x i8> %arg) {
|
|
; CHECK-LABEL: @ctlz_knownbits_vec(
|
|
; CHECK-NEXT: ret <2 x i1> zeroinitializer
|
|
;
|
|
%or = or <2 x i8> %arg, <i8 32, i8 32>
|
|
%cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone
|
|
%res = icmp eq <2 x i8> %cnt, <i8 4, i8 4>
|
|
ret <2 x i1> %res
|
|
}
|
|
|
|
define i1 @ctlz_knownbits2(i8 %arg) {
|
|
; CHECK-LABEL: @ctlz_knownbits2(
|
|
; CHECK-NEXT: [[OR:%.*]] = or i8 [[ARG:%.*]], 32
|
|
; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #2, !range ![[$CTLZ_RANGE:[0-9]+]]
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[CNT]], 2
|
|
; CHECK-NEXT: ret i1 [[RES]]
|
|
;
|
|
%or = or i8 %arg, 32
|
|
%cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone
|
|
%res = icmp eq i8 %cnt, 2
|
|
ret i1 %res
|
|
}
|
|
|
|
define <2 x i1> @ctlz_knownbits2_vec(<2 x i8> %arg) {
|
|
; CHECK-LABEL: @ctlz_knownbits2_vec(
|
|
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32>
|
|
; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true)
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[CNT]], <i8 2, i8 2>
|
|
; CHECK-NEXT: ret <2 x i1> [[RES]]
|
|
;
|
|
%or = or <2 x i8> %arg, <i8 32, i8 32>
|
|
%cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone
|
|
%res = icmp eq <2 x i8> %cnt, <i8 2, i8 2>
|
|
ret <2 x i1> %res
|
|
}
|
|
|
|
define i1 @ctlz_knownbits3(i8 %arg) {
|
|
; CHECK-LABEL: @ctlz_knownbits3(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%or = or i8 %arg, 32
|
|
%cnt = call i8 @llvm.ctlz.i8(i8 %or, i1 true) nounwind readnone
|
|
%res = icmp eq i8 %cnt, 3
|
|
ret i1 %res
|
|
}
|
|
|
|
; TODO: The icmp is unnecessary given the known bits of the input.
|
|
define <2 x i1> @ctlz_knownbits3_vec(<2 x i8> %arg) {
|
|
; CHECK-LABEL: @ctlz_knownbits3_vec(
|
|
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32>
|
|
; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true)
|
|
; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[CNT]], <i8 3, i8 3>
|
|
; CHECK-NEXT: ret <2 x i1> [[RES]]
|
|
;
|
|
%or = or <2 x i8> %arg, <i8 32, i8 32>
|
|
%cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone
|
|
%res = icmp eq <2 x i8> %cnt, <i8 3, i8 3>
|
|
ret <2 x i1> %res
|
|
}
|
|
|
|
define i32 @ctlz_undef(i32 %Value) {
|
|
; CHECK-LABEL: @ctlz_undef(
|
|
; CHECK-NEXT: ret i32 undef
|
|
;
|
|
%ctlz = call i32 @llvm.ctlz.i32(i32 0, i1 true)
|
|
ret i32 %ctlz
|
|
}
|
|
|
|
define <2 x i32> @ctlz_undef_vec(<2 x i32> %Value) {
|
|
; CHECK-LABEL: @ctlz_undef_vec(
|
|
; CHECK-NEXT: ret <2 x i32> undef
|
|
;
|
|
%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> zeroinitializer, i1 true)
|
|
ret <2 x i32> %ctlz
|
|
}
|
|
|
|
define i32 @ctlz_make_undef(i32 %a) {
|
|
%or = or i32 %a, 8
|
|
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %or, i1 false)
|
|
ret i32 %ctlz
|
|
; CHECK-LABEL: @ctlz_make_undef(
|
|
; CHECK-NEXT: %or = or i32 %a, 8
|
|
; CHECK-NEXT: %ctlz = tail call i32 @llvm.ctlz.i32(i32 %or, i1 true)
|
|
; CHECK-NEXT: ret i32 %ctlz
|
|
}
|
|
|
|
define <2 x i32> @ctlz_make_undef_vec(<2 x i32> %a) {
|
|
; CHECK-LABEL: @ctlz_make_undef_vec(
|
|
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
|
|
; CHECK-NEXT: [[CTLZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 true)
|
|
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
|
|
;
|
|
%or = or <2 x i32> %a, <i32 8, i32 8>
|
|
%ctlz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %or, i1 false)
|
|
ret <2 x i32> %ctlz
|
|
}
|
|
|
|
define i32 @cttz_undef(i32 %Value) nounwind {
|
|
; CHECK-LABEL: @cttz_undef(
|
|
; CHECK-NEXT: ret i32 undef
|
|
;
|
|
%cttz = call i32 @llvm.cttz.i32(i32 0, i1 true)
|
|
ret i32 %cttz
|
|
}
|
|
|
|
define <2 x i32> @cttz_undef_vec(<2 x i32> %Value) nounwind {
|
|
; CHECK-LABEL: @cttz_undef_vec(
|
|
; CHECK-NEXT: ret <2 x i32> undef
|
|
;
|
|
%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> zeroinitializer, i1 true)
|
|
ret <2 x i32> %cttz
|
|
}
|
|
|
|
define i32 @cttz_make_undef(i32 %a) {
|
|
%or = or i32 %a, 8
|
|
%cttz = tail call i32 @llvm.cttz.i32(i32 %or, i1 false)
|
|
ret i32 %cttz
|
|
; CHECK-LABEL: @cttz_make_undef(
|
|
; CHECK-NEXT: %or = or i32 %a, 8
|
|
; CHECK-NEXT: %cttz = tail call i32 @llvm.cttz.i32(i32 %or, i1 true)
|
|
; CHECK-NEXT: ret i32 %cttz
|
|
}
|
|
|
|
define <2 x i32> @cttz_make_undef_vec(<2 x i32> %a) {
|
|
; CHECK-LABEL: @cttz_make_undef_vec(
|
|
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
|
|
; CHECK-NEXT: [[CTTZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
|
|
; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
|
|
;
|
|
%or = or <2 x i32> %a, <i32 8, i32 8>
|
|
%cttz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 false)
|
|
ret <2 x i32> %cttz
|
|
}
|
|
|
|
define i32 @ctlz_select(i32 %Value) nounwind {
|
|
; CHECK-LABEL: @ctlz_select(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 %Value, i1 false)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%tobool = icmp ne i32 %Value, 0
|
|
%ctlz = call i32 @llvm.ctlz.i32(i32 %Value, i1 true)
|
|
%s = select i1 %tobool, i32 %ctlz, i32 32
|
|
ret i32 %s
|
|
}
|
|
|
|
define <2 x i32> @ctlz_select_vec(<2 x i32> %Value) nounwind {
|
|
; CHECK-LABEL: @ctlz_select_vec(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false)
|
|
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
|
;
|
|
%tobool = icmp ne <2 x i32> %Value, zeroinitializer
|
|
%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %Value, i1 true)
|
|
%s = select <2 x i1> %tobool, <2 x i32> %ctlz, <2 x i32> <i32 32, i32 32>
|
|
ret <2 x i32> %s
|
|
}
|
|
|
|
define i32 @cttz_select(i32 %Value) nounwind {
|
|
; CHECK-LABEL: @cttz_select(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 %Value, i1 false)
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
%tobool = icmp ne i32 %Value, 0
|
|
%cttz = call i32 @llvm.cttz.i32(i32 %Value, i1 true)
|
|
%s = select i1 %tobool, i32 %cttz, i32 32
|
|
ret i32 %s
|
|
}
|
|
|
|
define <2 x i32> @cttz_select_vec(<2 x i32> %Value) nounwind {
|
|
; CHECK-LABEL: @cttz_select_vec(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false)
|
|
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
|
;
|
|
%tobool = icmp ne <2 x i32> %Value, zeroinitializer
|
|
%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %Value, i1 true)
|
|
%s = select <2 x i1> %tobool, <2 x i32> %cttz, <2 x i32> <i32 32, i32 32>
|
|
ret <2 x i32> %s
|
|
}
|
|
|
|
define i1 @overflow_div_add(i32 %v1, i32 %v2) nounwind {
|
|
; CHECK-LABEL: @overflow_div_add(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%div = sdiv i32 %v1, 2
|
|
%t = call %ov.result.32 @llvm.sadd.with.overflow.i32(i32 %div, i32 1)
|
|
%obit = extractvalue %ov.result.32 %t, 1
|
|
ret i1 %obit
|
|
}
|
|
|
|
define i1 @overflow_div_sub(i32 %v1, i32 %v2) nounwind {
|
|
; Check cases where the known sign bits are larger than the word size.
|
|
; CHECK-LABEL: @overflow_div_sub(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%a = ashr i32 %v1, 18
|
|
%div = sdiv i32 %a, 65536
|
|
%t = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %div, i32 1)
|
|
%obit = extractvalue %ov.result.32 %t, 1
|
|
ret i1 %obit
|
|
}
|
|
|
|
define i1 @overflow_mod_mul(i32 %v1, i32 %v2) nounwind {
|
|
; CHECK-LABEL: @overflow_mod_mul(
|
|
; CHECK-NEXT: ret i1 false
|
|
;
|
|
%rem = srem i32 %v1, 1000
|
|
%t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem)
|
|
%obit = extractvalue %ov.result.32 %t, 1
|
|
ret i1 %obit
|
|
}
|
|
|
|
define i1 @overflow_mod_overflow_mul(i32 %v1, i32 %v2) nounwind {
|
|
; CHECK-LABEL: @overflow_mod_overflow_mul(
|
|
; CHECK-NEXT: [[REM:%.*]] = srem i32 %v1, 65537
|
|
; CHECK-NEXT: [[T:%.*]] = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 [[REM]], i32 [[REM]])
|
|
; CHECK-NEXT: [[OBIT:%.*]] = extractvalue %ov.result.32 [[T]], 1
|
|
; CHECK-NEXT: ret i1 [[OBIT]]
|
|
;
|
|
%rem = srem i32 %v1, 65537
|
|
; This may overflow because the result of the mul operands may be greater than 16bits
|
|
; and the result greater than 32.
|
|
%t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem)
|
|
%obit = extractvalue %ov.result.32 %t, 1
|
|
ret i1 %obit
|
|
}
|
|
|
|
define %ov.result.32 @ssubtest_reorder(i8 %a) {
|
|
%A = sext i8 %a to i32
|
|
%x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 0, i32 %A)
|
|
ret %ov.result.32 %x
|
|
; CHECK-LABEL: @ssubtest_reorder
|
|
; CHECK: %x = sub nsw i32 0, %A
|
|
; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
|
|
; CHECK-NEXT: ret %ov.result.32 %1
|
|
}
|
|
|
|
define %ov.result.32 @never_overflows_ssub_test0(i32 %a) {
|
|
%x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %a, i32 0)
|
|
ret %ov.result.32 %x
|
|
; CHECK-LABEL: @never_overflows_ssub_test0
|
|
; CHECK-NEXT: %[[x:.*]] = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %a, 0
|
|
; CHECK-NEXT: ret %ov.result.32 %[[x]]
|
|
}
|
|
|
|
define void @cos(double *%P) {
|
|
; CHECK-LABEL: @cos(
|
|
; CHECK-NEXT: store volatile double 1.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.cos.f64(double 0.0) nounwind
|
|
store volatile double %B, double* %P
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @sin(double *%P) {
|
|
; CHECK-LABEL: @sin(
|
|
; CHECK-NEXT: store volatile double 0.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.sin.f64(double 0.0) nounwind
|
|
store volatile double %B, double* %P
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @floor(double *%P) {
|
|
; CHECK-LABEL: @floor(
|
|
; CHECK-NEXT: store volatile double 1.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: store volatile double -2.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.floor.f64(double 1.5) nounwind
|
|
store volatile double %B, double* %P
|
|
%C = tail call double @llvm.floor.f64(double -1.5) nounwind
|
|
store volatile double %C, double* %P
|
|
ret void
|
|
}
|
|
|
|
define void @ceil(double *%P) {
|
|
; CHECK-LABEL: @ceil(
|
|
; CHECK-NEXT: store volatile double 2.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: store volatile double -1.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.ceil.f64(double 1.5) nounwind
|
|
store volatile double %B, double* %P
|
|
%C = tail call double @llvm.ceil.f64(double -1.5) nounwind
|
|
store volatile double %C, double* %P
|
|
ret void
|
|
}
|
|
|
|
define void @trunc(double *%P) {
|
|
; CHECK-LABEL: @trunc(
|
|
; CHECK-NEXT: store volatile double 1.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: store volatile double -1.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.trunc.f64(double 1.5) nounwind
|
|
store volatile double %B, double* %P
|
|
%C = tail call double @llvm.trunc.f64(double -1.5) nounwind
|
|
store volatile double %C, double* %P
|
|
ret void
|
|
}
|
|
|
|
define void @rint(double *%P) {
|
|
; CHECK-LABEL: @rint(
|
|
; CHECK-NEXT: store volatile double 2.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: store volatile double -2.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.rint.f64(double 1.5) nounwind
|
|
store volatile double %B, double* %P
|
|
%C = tail call double @llvm.rint.f64(double -1.5) nounwind
|
|
store volatile double %C, double* %P
|
|
ret void
|
|
}
|
|
|
|
define void @nearbyint(double *%P) {
|
|
; CHECK-LABEL: @nearbyint(
|
|
; CHECK-NEXT: store volatile double 2.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: store volatile double -2.000000e+00, double* %P, align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%B = tail call double @llvm.nearbyint.f64(double 1.5) nounwind
|
|
store volatile double %B, double* %P
|
|
%C = tail call double @llvm.nearbyint.f64(double -1.5) nounwind
|
|
store volatile double %C, double* %P
|
|
ret void
|
|
}
|
|
|
|
; CHECK: [[$CTTZ_RANGE]] = !{i32 0, i32 3}
|
|
; CHECK: [[$CTLZ_RANGE]] = !{i8 0, i8 3}
|