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Changpeng Fang da38b5fd49 AMDGPU/SI: Turn off GPR Indexing Mode immediately after the interested instruction. 
Summary:
  In the current implementation of GPR Indexing Mode when the index is of non-uniform, the s_set_gpr_idx_off instruction
is incorrectly inserted after the loop. This will lead the instructions with vgpr operands (v_readfirstlane for example) to read incorrect
vgpr.
 In this patch, we fix the issue by inserting s_set_gpr_idx_on/off immediately around the interested instruction.

Reviewers:
  rampitec

Differential Revision:
  https://reviews.llvm.org/D43297

llvm-svn: 325355
 		2018-02-16 16:31:30 +00:00
..
AArch64 GlobalISel: IRTranslate llvm.fmuladd.* intrinsic 2018-02-13 00:47:46 +00:00
AMDGPU AMDGPU/SI: Turn off GPR Indexing Mode immediately after the interested instruction. 2018-02-16 16:31:30 +00:00
ARC
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ARM [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
AVR [CodeGen] Unify the syntax of MBB successors in MIR and -debug output 2018-02-09 00:10:31 +00:00
BPF bpf: fix a bug in dag2dag optimization for loads from readonly section 2018-02-15 17:06:45 +00:00
Generic [CodeGen] Unify the syntax of MBB successors in MIR and -debug output 2018-02-09 00:10:31 +00:00
Hexagon [Hexagon] Fix lowering of formal arguments after r324737 2018-02-15 15:47:53 +00:00
Inputs
…
Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR [GISel]: Verify COPIES involving generic registers. 2018-02-09 01:27:23 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips [mips] Remove codegen support from some 16 bit instructions 2018-02-16 13:34:23 +00:00
NVPTX [DAGCombiner] Call ExtendUsesToFormExtLoad in (zext (and (load)))->(and (zextload)) even when the and does not have multiple uses 2018-02-15 20:20:32 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC [MergeICmps] Re-commit rL324317 "Enable the MergeICmps Pass by default." 2018-02-07 09:58:55 +00:00
RISCV [RISCV] Update two RISCV codegen tests after rL323991 2018-02-03 13:02:30 +00:00
SPARC [MachineCopyPropagation] Extend pass to do COPY source forwarding 2018-02-01 18:54:01 +00:00
SystemZ [SelectionDAG] Consider endianness in scalarizeVectorStore(). 2018-02-02 08:48:02 +00:00
Thumb [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
Thumb2 [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
WebAssembly [WebAssembly] Add mechanisms for specifying an explicit import module name. 2018-02-09 23:13:22 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
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X86 [SelectionDAG] Enable SimplifyDemandedVectorElts support for simplifying shuffle masks 2018-02-16 16:22:14 +00:00
XCore Emit smaller exception tables for non-SJLJ mode. 2018-02-09 17:13:37 +00:00