llvm-project/llvm/test/MC/Disassembler/SystemZ
Zhan Jun Liau 8d3f29759f [SystemZ] Add missing classes and instructions
Summary:
Add instruction formats E, RSI, SSd, SSE, and SSF.

Added BRXH, BRXLE, PR, MVCK, STRAG, and ECTG instructions to test out
those formats.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23179

llvm-svn: 277822
2016-08-05 15:14:34 +00:00
..
insns-pcrel.txt [SystemZ] Add missing classes and instructions 2016-08-05 15:14:34 +00:00
insns-z13-bad.txt [SystemZ] Add z13 vector facility and MC support 2015-05-05 19:23:40 +00:00
insns-z13.txt [SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities 2016-07-11 18:45:03 +00:00
insns.txt [SystemZ] Add missing classes and instructions 2016-08-05 15:14:34 +00:00
invalid-regs.txt
lit.local.cfg
trunc-01.txt
trunc-02.txt
trunc-03.txt
unmapped.txt