forked from OSchip/llvm-project
77 lines
2.0 KiB
LLVM
77 lines
2.0 KiB
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE
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;CHECK-LABEL: foo1_8:
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;CHECK: vcvtdq2ps
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;CHECK: ret
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;
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;CHECK-WIDE-LABEL: foo1_8:
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;CHECK-WIDE: vpmovzxbd %xmm0, %xmm1
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;CHECK-WIDE-NEXT: vpslld $24, %xmm1, %xmm1
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;CHECK-WIDE-NEXT: vpsrad $24, %xmm1, %xmm1
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;CHECK-WIDE-NEXT: vpshufb {{.*}}, %xmm0, %xmm0
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;CHECK-WIDE-NEXT: vpslld $24, %xmm0, %xmm0
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;CHECK-WIDE-NEXT: vpsrad $24, %xmm0, %xmm0
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;CHECK-WIDE-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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;CHECK-WIDE-NEXT: vcvtdq2ps %ymm0, %ymm0
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;CHECK-WIDE-NEXT: ret
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define <8 x float> @foo1_8(<8 x i8> %src) {
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%res = sitofp <8 x i8> %src to <8 x float>
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ret <8 x float> %res
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}
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;CHECK-LABEL: foo1_4:
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;CHECK: vcvtdq2ps
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;CHECK: ret
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;
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;CHECK-WIDE-LABEL: foo1_4:
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;CHECK-WIDE: vpmovzxbd %xmm0, %xmm0
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;CHECK-WIDE-NEXT: vpslld $24, %xmm0, %xmm0
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;CHECK-WIDE-NEXT: vpsrad $24, %xmm0, %xmm0
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;CHECK-WIDE-NEXT: vcvtdq2ps %xmm0, %xmm0
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;CHECK-WIDE-NEXT: ret
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define <4 x float> @foo1_4(<4 x i8> %src) {
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%res = sitofp <4 x i8> %src to <4 x float>
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ret <4 x float> %res
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}
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;CHECK-LABEL: foo2_8:
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;CHECK: vcvtdq2ps
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;CHECK: ret
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;
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;CHECK-WIDE-LABEL: foo2_8:
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;CHECK-WIDE: vcvtdq2ps %ymm{{.*}}, %ymm{{.*}}
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;CHECK-WIDE: ret
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define <8 x float> @foo2_8(<8 x i8> %src) {
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%res = uitofp <8 x i8> %src to <8 x float>
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ret <8 x float> %res
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}
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;CHECK-LABEL: foo2_4:
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;CHECK: vcvtdq2ps
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;CHECK: ret
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;
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;CHECK-WIDE-LABEL: foo2_4:
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;CHECK-WIDE: vcvtdq2ps %xmm{{.*}}, %xmm{{.*}}
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;CHECK-WIDE: ret
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define <4 x float> @foo2_4(<4 x i8> %src) {
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%res = uitofp <4 x i8> %src to <4 x float>
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ret <4 x float> %res
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}
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;CHECK-LABEL: foo3_8:
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;CHECK: vcvttps2dq
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;CHECK: ret
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define <8 x i8> @foo3_8(<8 x float> %src) {
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%res = fptosi <8 x float> %src to <8 x i8>
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ret <8 x i8> %res
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}
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;CHECK-LABEL: foo3_4:
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;CHECK: vcvttps2dq
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;CHECK: ret
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define <4 x i8> @foo3_4(<4 x float> %src) {
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%res = fptosi <4 x float> %src to <4 x i8>
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ret <4 x i8> %res
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}
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