Chad Rosier d96e9f14ee [AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shift ... plus add. The shift can be folded into the add. This only effects codegen when the constant is 3. llvm-svn: 210445		2014-06-09 01:25:51 +00:00
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AArch64	[AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shift	2014-06-09 01:25:51 +00:00
ARM	test: add test case for SVN r210406	2014-06-08 01:27:32 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.	2014-06-05 19:29:43 +00:00
Hexagon	reverting r209132	2014-05-19 16:22:11 +00:00
Inputs	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
MSP430	Fix broken FileCheck prefixes	2014-05-23 19:06:24 +00:00
Mips	Revert "Do materialize for floating point"	2014-06-08 09:13:42 +00:00
NVPTX	Allow aliases to be unnamed_addr.	2014-06-06 01:20:28 +00:00
PowerPC	[PPC64LE] Fix lowering of BUILD_VECTOR and SHUFFLE_VECTOR for little endian	2014-06-06 14:06:26 +00:00
R600	Allow aliases to be unnamed_addr.	2014-06-06 01:20:28 +00:00
SPARC	TableGen: fix operand counting for aliases	2014-05-16 09:42:04 +00:00
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Segmented stacks: omit __morestack call when there's no frame.	2014-05-22 13:03:43 +00:00
Thumb2	ARM & AArch64: make use of common cmpxchg idioms after expansion	2014-05-30 10:09:59 +00:00
X86	Fix typos	2014-06-07 21:23:09 +00:00
XCore	Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"	2014-04-21 17:57:07 +00:00