llvm-project/llvm/test/CodeGen
Michael Liao ab97668061 Fix PR10499
- Check whether SSE is available before lowering all 1s vector building with
  PCMPEQD, which is only available from SSE2

llvm-svn: 176058
2013-02-25 23:01:03 +00:00
..
AArch64 AArch64: remove ConstantIsland pass & put literals in separate section. 2013-02-15 09:33:43 +00:00
ARM Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. 2013-02-22 10:01:33 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Hexagon: Expand cttz, ctlz, and ctpop for now. 2013-02-21 19:39:40 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
MSP430 Add support for varargs functions for msp430. 2012-11-21 17:28:27 +00:00
Mips Expand pseudos/macros for Selt. This is the last of the complex 2013-02-23 03:09:56 +00:00
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Fix missing relocation for TLS addressing peephole optimization. 2013-02-25 16:44:35 +00:00
R600 R600: Fix for Unigine when MachineSched is enabled 2013-02-21 15:06:59 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Fix thumbv5e frame lowering assertion failure. 2013-02-20 12:21:33 +00:00
Thumb2 Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. 2013-02-22 10:01:33 +00:00
X86 Fix PR10499 2013-02-25 23:01:03 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00