Petr Hosek 24c615fa6b [InstrProfData] Bump the raw profile version to 8 ... This is to account for the change that made CountersPtr in __profd_ relative which landed in a1532ed275. That change hasn't updated the raw profile version, and while the profile layout stayed the same, profiles generated by tip-of-tree LLVM are incompatible with 13.x tooling. Differential Revision: https://reviews.llvm.org/D111123		2021-10-05 09:57:56 -07:00
..
Analysis	[NFC][X86][LV] Add basic costmodel test coverage for not-fully-interleaved i32 loads	2021-10-05 19:39:50 +03:00
Assembler	[ThinLTO] Add noRecurse and noUnwind thinlink function attribute propagation	2021-09-27 12:28:07 -07:00
Bindings	…
Bitcode	[ThinLTO] Add noRecurse and noUnwind thinlink function attribute propagation	2021-09-27 12:28:07 -07:00
BugPoint	…
CodeGen	[SystemZ] Implement memcmp of variable length with CLC.	2021-10-05 18:20:36 +02:00
DebugInfo	[DebugInfo][InstrRef] Track all of DBG_PHIs operands	2021-10-05 14:01:26 +01:00
Demangle	[Demangle][Rust] Parse non-ASCII identifiers	2021-10-01 22:08:32 +02:00
Examples	[ORC] Temporarily remove the lljit-with-remote-debugging test.	2021-09-12 18:52:30 +10:00
ExecutionEngine	[JITLink][MachO][x86-64] Add support for splitting compact-unwind sections.	2021-09-28 19:12:56 -07:00
Feature	…
FileCheck	…
Instrumentation	[AMDGPU] Require AMDGPU target for ASAN instrumentation tests	2021-09-29 10:52:27 +01:00
Integer	…
JitListener	[IntelJITListener] Fix order in JitListener/multiple.ll	2021-09-29 16:46:09 -07:00
LTO	Resolve {GlobalValue,GloalIndirectSymol}::getBaseObject confusion	2021-09-23 09:23:35 -07:00
Linker	…
MC	[RISCV] Update to vlm.v and vsm.v according to v1.0-rc1.	2021-10-05 21:49:54 +08:00
MachineVerifier	…
Object	…
ObjectYAML	[WebAssembly] Convert to new "dylink.0" section format	2021-09-12 05:30:38 -07:00
Other	[ModuleInlinerWrapperPass] Do some naive printing of wrapped pipeline with -print-pipeline-passes	2021-09-23 09:54:42 +02:00
SafepointIRVerifier	…
Support	…
SymbolRewriter	…
TableGen	[TableGen] Allow targets to entirely ignore Psets for registers	2021-09-23 23:07:35 -04:00
ThinLTO/X86	Reland [clang] Rework dontcall attributes	2021-09-28 15:31:30 -07:00
Transforms	[SLP]Detect reused scalars in all possible gathers for better vectorization cost.	2021-10-05 09:43:03 -07:00
Unit	…
Verifier	[VP] Vector predicated vector splice intrinsic	2021-09-29 10:43:36 +02:00
YAMLParser	…
tools	[InstrProfData] Bump the raw profile version to 8	2021-10-05 09:57:56 -07:00
.clang-format	…
CMakeLists.txt	…
TestRunner.sh	…
lit.cfg.py	Add extra check for llvm::Any::TypeId visibility	2021-09-15 08:32:55 +02:00
lit.site.cfg.py.in	Add extra check for llvm::Any::TypeId visibility	2021-09-15 08:32:55 +02:00