forked from OSchip/llvm-project
117 lines
4.3 KiB
C++
117 lines
4.3 KiB
C++
//=- WebAssemblyMachineFunctionInfo.cpp - WebAssembly Machine Function Info -=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file implements WebAssembly-specific per-machine-function
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/// information.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblyISelLowering.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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WebAssemblyFunctionInfo::~WebAssemblyFunctionInfo() = default; // anchor.
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void WebAssemblyFunctionInfo::initWARegs(MachineRegisterInfo &MRI) {
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assert(WARegs.empty());
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unsigned Reg = UnusedReg;
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WARegs.resize(MRI.getNumVirtRegs(), Reg);
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}
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void llvm::computeLegalValueVTs(const Function &F, const TargetMachine &TM,
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Type *Ty, SmallVectorImpl<MVT> &ValueVTs) {
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const DataLayout &DL(F.getParent()->getDataLayout());
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const WebAssemblyTargetLowering &TLI =
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*TM.getSubtarget<WebAssemblySubtarget>(F).getTargetLowering();
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SmallVector<EVT, 4> VTs;
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ComputeValueVTs(TLI, DL, Ty, VTs);
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for (EVT VT : VTs) {
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unsigned NumRegs = TLI.getNumRegisters(F.getContext(), VT);
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MVT RegisterVT = TLI.getRegisterType(F.getContext(), VT);
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for (unsigned I = 0; I != NumRegs; ++I)
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ValueVTs.push_back(RegisterVT);
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}
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}
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void llvm::computeSignatureVTs(const FunctionType *Ty,
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const Function *TargetFunc,
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const Function &ContextFunc,
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const TargetMachine &TM,
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SmallVectorImpl<MVT> &Params,
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SmallVectorImpl<MVT> &Results) {
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computeLegalValueVTs(ContextFunc, TM, Ty->getReturnType(), Results);
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MVT PtrVT = MVT::getIntegerVT(TM.createDataLayout().getPointerSizeInBits());
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if (Results.size() > 1 &&
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!TM.getSubtarget<WebAssemblySubtarget>(ContextFunc).hasMultivalue()) {
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// WebAssembly can't lower returns of multiple values without demoting to
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// sret unless multivalue is enabled (see
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// WebAssemblyTargetLowering::CanLowerReturn). So replace multiple return
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// values with a poitner parameter.
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Results.clear();
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Params.push_back(PtrVT);
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}
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for (auto *Param : Ty->params())
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computeLegalValueVTs(ContextFunc, TM, Param, Params);
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if (Ty->isVarArg())
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Params.push_back(PtrVT);
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// For swiftcc, emit additional swiftself and swifterror parameters
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// if there aren't. These additional parameters are also passed for caller.
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// They are necessary to match callee and caller signature for indirect
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// call.
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if (TargetFunc && TargetFunc->getCallingConv() == CallingConv::Swift) {
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MVT PtrVT = MVT::getIntegerVT(TM.createDataLayout().getPointerSizeInBits());
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bool HasSwiftErrorArg = false;
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bool HasSwiftSelfArg = false;
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for (const auto &Arg : TargetFunc->args()) {
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HasSwiftErrorArg |= Arg.hasAttribute(Attribute::SwiftError);
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HasSwiftSelfArg |= Arg.hasAttribute(Attribute::SwiftSelf);
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}
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if (!HasSwiftErrorArg)
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Params.push_back(PtrVT);
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if (!HasSwiftSelfArg)
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Params.push_back(PtrVT);
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}
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}
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void llvm::valTypesFromMVTs(const ArrayRef<MVT> &In,
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SmallVectorImpl<wasm::ValType> &Out) {
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for (MVT Ty : In)
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Out.push_back(WebAssembly::toValType(Ty));
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}
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std::unique_ptr<wasm::WasmSignature>
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llvm::signatureFromMVTs(const SmallVectorImpl<MVT> &Results,
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const SmallVectorImpl<MVT> &Params) {
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auto Sig = std::make_unique<wasm::WasmSignature>();
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valTypesFromMVTs(Results, Sig->Returns);
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valTypesFromMVTs(Params, Sig->Params);
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return Sig;
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}
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yaml::WebAssemblyFunctionInfo::WebAssemblyFunctionInfo(
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const llvm::WebAssemblyFunctionInfo &MFI)
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: CFGStackified(MFI.isCFGStackified()) {}
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void yaml::WebAssemblyFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
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MappingTraits<WebAssemblyFunctionInfo>::mapping(YamlIO, *this);
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}
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void WebAssemblyFunctionInfo::initializeBaseYamlFields(
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const yaml::WebAssemblyFunctionInfo &YamlMFI) {
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CFGStackified = YamlMFI.CFGStackified;
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}
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